Model 30 Mode
7
DSK
CHG
6
0
5
0
4
0
3
2
1
0
DMAEN NOPREC DRATE DRATE
SEL1
SEL0
RESET
COND.
N/A
0
0
0
0
0
1
0
BIT 0-1 DATA RATE SELECT
These bits control the data rate of the floppy
controller. See Table 11 for the settings
BIT 3 DMAEN
This bit reflects the value of DMAEN bit set in
the DOR register bit 3.
corresponding to the individual data rates. The
data rate select bits are unaffected by a
software reset, and are set to 250 Kbps after a
hardware reset.
BIT 4-6 UNDEFINED
Always read as a logic "0"
BIT 7 DSKCHG
This bit monitors the pin of the same name and
reflects the opposite value seen on the pin.
BIT 2 NOPREC
This bit reflects the value of NOPREC bit set in
the CCR register.
30
SMSC [ SMSC CORPORATION ]
