Enhanced Super I/O Controller with Fast IR
Datasheet
Chapter 3 Description of Pin Functions
PIN NO.
BUFFER
TYPE
NAME
TOTAL
SYMBOL
QFP/TQFP
PROCESSOR/HOST INTERFACE (34)
37:40,
42:45 /
35:38,
40:43
System Data Bus
8
SD[0:7]
IO24
20:30 /
18:28
11-bit System Address Bus
11
SA[0:10]
I
31 / 29
36 / 34
55 / 53
46 / 44
33 / 31
Chip Select/SA11 (Note 3.2)
Address Enable
I/O Channel Ready
ISA Reset Drive
1
1
1
1
1
nCS/SA11
AEN
IOCHRDY
RESET_DRV
I
I
OD24
IS
Serial IRQ/Parallel IRQ_3
SER_IRQ/
IO24/O24/
IRQ3
D24
(Note 3.1)
32 / 30
PCI Clock for Serial IRQ (33MHz/30MHz)/ Parallel
IRQ_4
1
PCI_CLK/
IRQ4
IO24/O24/
OD24
(Note 3.1)
50 / 48
48 / 46
52 / 50
47 / 45
49 / 47
51 / 49
DMA Request 1
DMA Request 2
DMA Request 3/8042 P12
DMA Acknowledge 1
DMA Acknowledge 2
DMA Acknowledge 3/8042 P16
1
1
1
1
1
1
DRQ1
DRQ2
DRQ3/P12
nDACK1
nDACK2
nDACK3/
P16
O24
O24
O24/IO24
I
I
I/IO24
54 / 52
34 / 32
35 / 33
Terminal Count
I/O Read
I/O Write
1
1
1
TC
nIOR
nIOW
I
I
I
CLOCKS (1)
19 / 17
14.318MHz Clock Input
INFRARED INTERFACE (2)
Infrared Rx
1
CLOCKI
ICLK
61 / 59
62 / 60
1
1
IRRX
IRTX
I
Infrared Tx
O24
POWER PINS (8)
18,53,
65,93 /
Power
VCC
16, 51, 63,
91
7,41, 60,76 / Ground
5, 39, 58, 74
VSS
FDD INTERFACE (16)
16 / 14
11 / 9
10 / 8
Read Disk Data
Write Gate
Write Disk Data
1
1
1
nRDATA
nWGATE
nWDATA
IS
O24/OD24
O24/OD24
SMSC FDC37C672
Page 12
Rev. 10-29-03
DATASHEET
SMSC [ SMSC CORPORATION ]
