Enhanced Super I/O Controller with Fast IR
Datasheet
Chapter 2 Pin Configuration
nACK
80
DRVDEN0
DRVDEN1/IRMODE
nMTRO
nDS1
1
BUSY
79
2
PE
78
3
SLCT
77
4
VSS
76
nDS0
5
PD7
75
nMTR1
VSS
nDIR
6
PD6
74
7
PD5
73
8
PD4
72
nSTEP
nWDATA
nWGATE
nHDSEL
nINDEX
nTRK0
nWRTPRT
nRDATA
nDSKCHG
VCC
9
PD3
71
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
PD2
70
PD1
69
PD0
68
FDC37C67x
FDC37C672
nSLCTIN
67
nINIT
66
100 PIN QFP
VCC
65
100 PIN QFP
A20M
64
KBDRST
63
IRTX
62
CLOCKI
SA0
IRRX
61
VSS
60
SA1
MCLKK
59
SA2
MDAT
58
SA3
KCLK
57
SA4
KDAT
56
SA5
IOCHRDY
55
SA6
TC
54
SA7
VCC
53
SA8
DRQ3/P12
52
SA9
nDACK3/P16
51
SA10
Figure 2.1 - FDC37C672 100 Pin QFP
SMSC FDC37C672
Page 10
Rev. 10-29-03
DATASHEET