Table 34 - Reset Function Table
RESET CONTROL
REGISTER/SIGNAL
Interrupt Enable Register
Interrupt Identification Reg.
FIFO Control
RESET STATE
All bits low
RESET
RESET
Bit 0 is high; Bits 1 thru 7 low
RESET
All bits low
Line Control Reg.
RESET
All bits low
MODEM Control Reg.
Line Status Reg.
RESET
All bits low
RESET
All bits low except 5, 6 high
MODEM Status Reg.
TXD1, TXD2
RESET
Bits 0 - 3 low; Bits 4 - 7 input
RESET
High
INTRPT (RCVR errs)
RESET/Read LSR
Low
INTRPT (RCVR Data Ready)
INTRPT (THRE)
OUT2B
RESET/Read RBR
RESET/ReadIIR/Write THR
RESET
Low
Low
High
RTSB
RESET
High
DTRB
RESET
High
OUT1B
RESET
High
RCVR FIFO
XMIT FIFO
RESET/FCR1*FCR0/ FCR0
RESET/FCR1*FCR0/ FCR0
All Bits Low
All Bits Low
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