data rate.
Note: Bits D0-D3 can only be overwritten when OW is
programmed as a "1".
2. The write pre-compensation given to a perpendicular
mode drive wil be 0ns.
3. For D0-D3 programmed to "0" for conventional mode
drives any data written will be at the currently
programmed write pre-compensation.
If either GAP or WGATE is a "1" then D0-D3 are
ignored.
Software and hardware resets have the following effect
on the PERPENDICULAR MODE COMMAND:
1. "Software" resets (via the DOR or DSR registers) will
only clear GAP and WGATE bits to "0". D0-D3 are
unaffected and retain their previous value.
2. "Hardware" resets will clear all bits (GAP, WGATE
and D0-D3) to "0", i.e all conventional mode.
Table 29 - Effects of WGATE and GAP Bits
PORTION OF
GAP 2
LENGTH OF
GAP2 FORMAT
FIELD
WRITTEN BY
WRITE DATA
OPERATION
WGATE GAP
MODE
0
0
0
1
Conventional
Perpendicular
(500 Kbps)
22 Bytes
22 Bytes
0 Bytes
19 Bytes
1
1
0
1
Reserved
22 Bytes
41 Bytes
0 Bytes
(Conventional)
Perpendicular
(1 Mbps)
38 Bytes
LOCK
The LOCK command defines whether the EFIFO,
FIFOTHR, and PRETRK parameters of the CONFIGURE
command can be RESET by the DOR and DSR
registers. When the LOCK bit is set to logic "1" all
subsequent "software RESETS by the DOR and DSR
registers will not change the previously set parameters to
their default values. All "hardware" RESET from the
RESET pin will set the LOCK bit to logic "0" and return
In order to protect systems with long DMA latencies
against older application software that can disable the
FIFO the LOCK Command has been added. This
command should only be used by the FDC routines, and
application software should refrain from using it. If an
application calls for the FIFO to be disabled then the
CONFIGURE command should be used.
the
EFIFO,
FIFOTHR,
and
PRETRK
to
68
SMSC [ SMSC CORPORATION ]
