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FDC37C669-MT 参数 Datasheet PDF下载

FDC37C669-MT图片预览
型号: FDC37C669-MT
PDF下载: 下载PDF文件 查看货源
内容描述: [Floppy Disk Drive, 0.25MBps, IDE Compatible, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100]
分类和应用: 数据传输PC驱动外围集成电路驱动器
文件页数/大小: 162 页 / 617 K
品牌: SMSC [ SMSC CORPORATION ]
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CR24  
locations, on 8 byte boundaries from 100H-3F8H.  
disable the serial port, set ADR9 and ADR8 to zero.  
To  
This register can only be accessed in the Configuration  
Mode and after the CSR has been initialized to 25H.  
The default value of this register after power up is 00H.  
This register is used to select the base address of UART1  
Upper Address Decode requirements : nCS='0' and  
A10='0' are required to access UART1 registers. A[2:0]  
are decoded as XXXb.  
(serial port 1).  
The serial port can be set to 96  
DB7  
DB6  
DB5  
DB4  
DB3  
DB2  
DB1  
DB0  
ADR9  
ADR8  
ADR7  
ADR6  
ADR5  
ADR4  
ADR3  
0
CR25  
locations, on 8 byte boundaries from 100H-3F8H.  
disable the serial port, set ADR9 and ADR8 to zero.  
To  
This register can only be accessed in the Configuration  
Mode and after the CSR has been initialized to 25H. The  
default value of this register after power up is 00H. This  
register is used to select the base address of UART2  
Upper Address Decode requirements : nCS='0' and  
A10='0' are required to access UART2 registers. A[2:0]  
are decoded as XXXb.  
(serial port 2).  
The serial port can be set to 96  
DB7  
DB6  
DB5  
DB4  
DB3  
DB2  
DB1  
DB0  
ADR9  
ADR8  
ADR7  
ADR6  
ADR5  
ADR4  
ADR3  
0
CR26  
register after power up is 00H. This register is used to  
select the DMA for the FDC (Bits 4:7) and the parallel  
port (bits 3:0). Any unselected DMA REQ output is in  
tristate.  
This register can only be accessed in the Configuration  
Mode and after the CSR has been initialized to 26H.  
The default value of this  
D3-D0  
D7-D4  
DMA Selected  
None  
0000  
0001  
0010  
0011  
DMA_A  
DMA_B  
DMA_C  
133  
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