TABLE 48 - PC/AT AND PS/2 AVAILABLE REGISTERS
AVAILABLE REGISTERS
BASE + ADDRESS
PC-AT
PS/2 (MODEL 30)
ACCESS PERMITTED
Access to these registers DOES NOT wake up the part
00H
01H
02H
03H
04H
06H
07H
07H
----
----
SRA
SRB
DOR (1)
---
R
R
DOR (1)
---
R/W
---
W
DSR (1)
---
DSR (1)
---
---
R
DIR
DIR
CCR
CCR
W
Access to these registers wakes up the part
04H
05H
MSR
Data
MSR
Data
R
R/W
Note 1: Writing to the DOR or DSR does not wake up the part, however, writing any of the motor
enable bits or doing a software reset (via DOR or DSR reset bits) will wake up the part.
TABLE 49 - STATE OF SYSTEM PINS IN AUTO POWERDOWN
SYSTEM PINS
STATE IN AUTO POWERDOWN
INPUT PINS
nIOR
nIOW
Unchanged
Unchanged
SA[0:9]
SD[0:7]
RESET_DRV
DACKx
TC
Unchanged
Unchanged
Unchanged
Unchanged
Unchanged
OUTPUT PINS
Unchanged (low)
Unchanged
IRQx
SD[0:7]
DRQx
Unchanged (low)
113
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