Output Data register. Table 48 shows how the
interface decodes the control signals. In
KEYBOARD ISA INTERFACE
addition to the above signals, the host interface
includes keyboard and mouse IRQs.
The FDC37B77x ISA interface is functionally
compatible with the 8042 style host interface. It
consists of the D0-7 data bus; the nIOR, nIOW
and the Status register, Input Data register, and
Table 48 - ISA I/O Address Map
ISA ADDRESS
nIOW
nIOR
BLOCK
KDATA
KDATA
KDCTL
KDCTL
FUNCTION (NOTE 1)
Keyboard Data Write (C/D=0)
Keyboard Data Read
0x60
0
1
0
1
1
0
1
0
0x64
Keyboard Command Write (C/D=1)
Keyboard Status Read
Note 1: These registers consist of three separate 8 bit registers. Status, Data/Command Write and
Data Read.
Keyboard Data Write
Keyboard Command Write
This is an 8 bit write only register. When
written, the C/D status bit of the status register
is cleared to zero and the IBF bit is set.
This is an 8 bit write only register. When
written, the C/D status bit of the status register
is set to one and the IBF bit is set.
Keyboard Data Read
Keyboard Status Read
This is an 8 bit read only register. If enabled by
"ENABLE FLAGS", when read, the KIRQ output
is cleared and the OBF flag in the status register
is cleared. If not enabled, the KIRQ and/or
AUXOBF1 must be cleared in software.
This is an 8 bit read only register. Refer to the
description of the Status Register for more
information.
121
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