interface. The VTR pin generates a VTR Power-
on-Reset signal to initialize these components.
Note: If VTR is to be used for programmable
wake-up events when VCC is removed, VTR must
be at its full minimum potential at least 10 ms
before Vcc begins a power-on cycle. When VTR
and Vcc are fully powered, the potential
difference between the two supplies must not
exceed 500mV.
Internal PWRGOOD
An internal PWRGOOD logical control is
included to minimize the effects of pin-state
uncertainty in the host interface as Vcc cycles on
and off. When the internal PWRGOOD signal is
“1” (active), Vcc is > 3.7V, and the FDC37B77x
host interface is active. When the internal
PWRGOOD signal is “0” (inactive), Vcc is £
3.7V, and the FDC37B77x host interface is
inactive; that is, ISA bus reads and writes will
not be decoded.
32.768 kHz TRICKLE CLOCK INPUT
The FDC37B77x utilizes a 32.768 kHz trickle
clock input and a clock multiplier (PLL) to drive
the CIrCC and PME interface when Vcc has been
removed. The PME Power bit, CR22.7, is used
to enable (power-up) the 32.768 kHz trickle
clock PLL. When the PME Power bit is set to
“1” (active), the 32.768 kHz trickle clock PLL is
running and can replace the 14.318 MHz clock
source for the PME Wake Events, depending
upon the state of the internal PWRGOOD signal
(Table 43). When the PME Power bit is reset to
“0” (inactive/default), the 32.768 kHz trickle
clock PLL is unpowered.
The FDC37B77x device pins nPME, CLOCKI32,
KCLK, MCLK, IRRX, nRI1, nRI2 and RXD2 are
part of the PME interface and remain active
when the internal PWRGOOD signal has gone
inactive, provided VTR is powered. The internal
PWRGOOD signal is also used to determine the
clock source for the CIrCC CIR and to disable
the IR Half Duplex Timeout.
TABLE 43 - FDC37B77x PLL CONTROLS AND SELECTS
PLL CONTROL PME POWER INTERNAL
PWRGOOD
(CR24.1)
(CR22.7)
DESCRIPTION
All PLLs Powered Down
1
0
0
X
0
0
X
0
1
32KHz PLL Unpowered, Not Selected,
14MHz PLL Powered, Selected.
32KHz PLL Powered, Selected,
14MHz PLL Unpowered, Not Selected.
32KHz PLL Powered, Not Selected, 14MHz PLL
Powered, Selected.
0
0
1
1
0
1
107
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