accessed at any time when in PS/2 mode. In the
PC/AT mode the data bus pins D0 - D7 are held in
a high impedance state for a read of address 3F0.
STATUS REGISTER A (SRA)
Address 3F0 READ ONLY
This register is read-only and monitors the state of
the FINTR pin and several disk interface pins in
PS/2 and Model 30 modes. The SRA can be
PS/2 Mode
7
INT
6
5
4
3
2
1
0
DIR
nDRV2 STEP nTRK0 HDSEL nINDX nWP
PENDING
RESET
COND.
0
1
0
N/A N/A N/A
0
0
Active low status of the TRK0 disk interface input.
BIT 0 DIRECTION
Active high status indicating the direction of head
movement. A logic "1" indicates inward direction; a
logic "0" indicates outward direction.
BIT 5 STEP
Active high status of the STEP output disk
interface output pin.
BIT 1 nWRITE PROTECT
Active low status of the WRITE PROTECT disk
interface input. A logic "0" indicates that the disk is
write protected. (See also Force Write Protect
Function)
BIT 6 nDRV2
Active low status of the DRV2 disk interface input
pin, indicating that a second drive has been
installed. Note: This function is not supported
in this chip. (Always 1, indicating 1 drive)
BIT 2 nINDEX
Active low status of the INDEX disk interface input.
BIT 7 INTERRUPT PENDING
Active high bit indicating the state of the Floppy
Disk Interrupt output.
BIT 3 HEAD SELECT
Active high status of the HDSEL disk interface
input. A logic "1" selects side 1 and a logic "0"
selects side 0.
BIT 4 nTRACK 0
16
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