The FDC is compatible to the 82077AA using
SMSC's proprietary floppy disk controller core.
FLOPPY DISK CONTROLLER
The Floppy Disk Controller (FDC) provides the
interface between a host microprocessor and the
FDC INTERNAL REGISTERS
floppy disk drives.
The FDC integrates the
functions of the Formatter/Controller, Digital Data
Separator, Write Precompensation and Data Rate
Selection logic for an IBM XT/AT compatible FDC.
The true CMOS 765B core guarantees 100% IBM
PC XT/AT compatibility in addition to providing
data overflow and underflow protection.
The Floppy Disk Controller contains eight internal
registers that facilitate the interfacing between the
host microprocessor and the disk drive. TABLE 5
shows the addresses required to access these
registers. Registers other than the ones shown are
not supported.
The rest of the description
assumes that the primary addresses have been
selected.
TABLE 5 - STATUS, DATA AND CONTROL REGISTERS
(Shown with base addresses of 3F0 and 370)
PRIMARY
ADDRESS
3F0
SECONDARY
ADDRESS
R/W
R
R
R/W
R/W
R
REGISTER
Status Register A (SRA)
Status Register B (SRB)
Digital Output Register (DOR)
Tape Drive Register (TSR)
Main Status Register (MSR)
Data Rate Select Register (DSR)
Data (FIFO)
370
371
372
373
374
374
375
3F1
3F2
3F3
3F4
3F4
3F5
W
R/W
3F6
376
Reserved
3F7
3F7
377
377
R
W
Digital Input Register (DIR)
Configuration Control Register (CCR)
15
SMSC [ SMSC CORPORATION ]
