Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features
Datasheet
Table 6.1 AVG[2:0] Bit Decoder
MEASUREMENTS PER READING
SFTR[7:5]
AVG1
REMOTE
DIODE 1
REMOTE
DIODE 2
INTERNAL
DIODE
ALL VOLTAGE READINGS
AVG2
AVG0
(+2.5V, +5V, +12V, VCCP, AND VCC)
0
0
0
1
0
0
1
X
0
1
128
16
128
16
8
1
8
1
X
X
16
16
16
32
16
32
32
32
Note: The default for the AVG[2:0] bits is ‘010’b.
To calculate conversion cycle timing for a given averaging mode:
■
■
■
Compute total number of temperature conversions (TEMP_CONV)
Compute total number of voltage conversions (VOLT_CONV)
Calculate Time to complete all conversions is:
Total Conversion Time = (TEMP_CONV)*96/(45kHz +/-10%)+ (VOLT_CONV)*68/(45kHz +/-10%)
Example: To calculate the nominal conversion time FOR AVG[2:0] = 001b.
Total Conversion Time = (TEMP_CONV)*96/(45kHz)+ (VOLT_CONV)*68/(45kHz)
Total Conversion Time = (16+16+1)*96/(45kHz)+ (5*1)*68/(45kHz)
Total Conversion Time = (33)*2.133ms+ (5)*1.511ms = ~78ms
Table 6.2 illustrates the min., nom., and max. conversion cycle timing for each of the four averaging
modes.
Table 6.2 Conversion Cycle Timing
CONVERSION CYCLE TIME (MSEC)
TOTAL
TOTAL
VOLTAGE
TEMPERATURE
CONVERSIONS
AVG[2:0]
CONVERSIONS
MIN.
NOM.
MAX.
000
001
(2x128)+(1x8)=264
(2x16)+(1x1)=33
3x16=48
5x8=40
5x1=5
567
71
624
78
693
87
01X (default)
1XX
5x16=80
5x32=160
203
406
223
447
248
496
3x32=96
Note 6.1 The hardware monitor conversion clock is 45KHz ± 10%.
Note 6.2 Temperature conversions take 96 clocks, each (2.133ms nom.); Voltage conversions take
68 clocks, each (1.511ms nom).
Revision 0.4 (04-04-05)
SMSC EMC6D103
DATA2S4HEET
SMSC [ SMSC CORPORATION ]
