Environmental Monitoring and Control Device
Datasheet
Register Read/
Register Name
Address Write
Bit 7
Bit 0 Default
(LSb) Value
Abbr.
Lock Start
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
(MSb)
6Dh
6Eh
6Fh
70h
71h
72h
73h
74h
75h
76h
77h
78h
79h
7Ah
7Bh
7Ch
7Dh
7Eh
7Fh
R/W Zone 1, Zone 2 Hysteresis HY12 H1-3 H1-2 H1-1 H1-0 H2-3 H2-2 H2-1 H2-0
44h
40h
00h
NA
Yes Yes
Yes Yes
Yes Yes
R/W Zone 3, Hysteresis
HYS3 H3-3 H3-2 H3-1 H3-0 RES RES RES RES
XORT RES RES RES RES RES RES RES XEN
R/W XOR Test Tree Enable
R
R
R
+3.3V Reading
+1.5 Reading
+1.8 Reading
V33R
V15R
V18R
V33L
V33H
V15L
V15H
V18L
V18h
MOTR
ERDR
7
7
7
7
7
7
7
6
6
6
6
6
6
6
5
5
5
5
5
5
5
4
4
4
4
4
4
4
4
4
3
3
3
3
3
3
3
3
3
2
2
2
2
2
2
2
1
1
1
1
1
1
1
0
0
0
0
0
0
0
No
No
No
No
No
No
NA
NA
R/W +3.3V Low Limit
R/W +3.3V High Limit
R/W +1.5 Low Limit
R/W +1.5 High Limit
R/W +1.8 Low Limit
R/W +1.8 High Limit
R/W Test Mode Register
00h
FFh
00h
FFh
00h
FFh
00h
00h
00h
No Yes
No Yes
No Yes
No Yes
No Yes
No Yes
Yes Yes
7
7
6
6
5
5
2
2
1
0
1
0
ANTST2
ANTST1
ANTST0
EXTCLK
DIGTST
ADCTST
OSCSEL
ADCAVG
RES
ARA
STOP
INVADD
RCV
ROWR
INVRW
NONAC
R
Error Debug Register
No
No
R/W Test Digital Value Register DVTR
R/W4 Special Function Register SFTR
R-C3 Interrupt Status Register 3 INT3
7
D2EN
6
D1EN
5
AVG
4
3
2
1
0
LPMD
Yes Yes
OFFCFG VOLTEN
INTEN
MONMD
E0h Yes4 Yes4
RES RES RES RES RES 33V
18V
15V
00h
ECh
10h
No
No
R/W Interrupt Enable
R/W Configuration
INTE VCC 12V
5V
33V VCCP 25V
18V
15V
Yes Yes
Yes Yes
INIT
FTTST
RES
SUREN
TRDY
RES
P4INT
RES
CONF
Fan Temp Interrupt
80h
R/W
FTIE
RES AMB TEMP FAN4 FAN3 FAN2 FAN1 FAN
5Eh
Yes Yes
Enable
Fan Tach/PWM Interrupt
81h
82h
R/W
FTIS
N/A
T4H
T4L
T3H
T3L
T2H
T2L
T1H
T1L
A4h
FFh
Yes Yes
Yes No
Select
R/W Reserved
RES RES RES RES RES RES RES RES
Sync Pulse Configuration
Register: ON/OFF
83h
R/W
FCF4 RES RES RES
ON
RES RES RES RES
62h
Yes Yes
84h
85h
R/W Reserved
R/W Reserved
N/A
N/A
RES RES RES RES RES RES RES RES
RES RES RES RES RES RES RES RES
03h
80h
Yes Yes
Yes Yes
Smooth Remote Diode
86h
87h
88h
R
SRD1
7
7
7
6
6
6
5
5
5
4
4
4
3
3
3
2
2
2
1
1
1
0
0
0
N/A
N/A
N/A
No
No
No
No
No
No
Reading 1
R
R
Smooth Ambient Reading SAMR
Smooth Remote Diode
Reading 2
SRD2
89h
8Ah
8Bh
8Ch
8Dh
R
R
ADC 2 LSB Test
Input Test Reg 1
ADTR
CBI1
7
RES
7
6
6
6
5
5
5
4
4
4
4
4
3
3
3
3
3
2
2
2
2
2
1
1
1
1
1
0
0
0
0
0
N/A
4Dh
4Dh
0Eh
0Eh
No
No
No
No
R/W Output Test Reg 1
Input Test Reg 2
CBO1
CBI2
Yes Yes
No No
Yes Yes
R
RES RES RES
R/W Output Test Reg 2
CBO2 RES RES RES
Notes:
1. The Fan x Current Duty Cycle Registers are only writeable when the associated fan is in manual
mode. In this case, the register is writeable when the start bit is set, but not when the lock bit is set.
2. The Lock and Start bits in the Ready/Lock/Start register are locked by the Lock Bit. The OVRID bit is
always writeable, both when the start bit is set and when the lock bit is set.
SMSC EMC6D100/EMC6D101
Page 39
Rev. 09-09-04
DATASHEET
SMSC [ SMSC CORPORATION ]
