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EMC2300-AZC 参数 Datasheet PDF下载

EMC2300-AZC图片预览
型号: EMC2300-AZC
PDF下载: 下载PDF文件 查看货源
内容描述: 风扇控制装置高频PWM和温度监视器 [Fan Control Device with High Frequency PWM and Temperature Monitors]
分类和应用: 风扇装置监视器光电二极管
文件页数/大小: 81 页 / 1625 K
品牌: SMSC [ SMSC CORPORATION ]
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Fan Control Device with High Frequency PWM and Temperature Monitors  
Datasheet  
Table 8.14 Interrupt Status Register 1  
R/W DEFAULT DESCRIPTION  
BIT  
NAME  
0
1
Reserved  
R
R
0
0
Reserved  
Vccp_Error  
The EMC2300 automatically sets this bit to 1 when the Vccp input voltage  
is less than or equal to the limit set in the Vccp Low Limit register or  
greater than the limit set in the Vccp High Limit register.  
2
VCC_Error  
R
0
The EMC2300 automatically sets this bit to 1 when the VCC input voltage  
is less than or equal to the limit set in the VCC Low Limit register or  
greater than the limit set in the VCC High Limit register.  
3
4
Reserved  
R
R
0
0
Reserved  
Remote  
Diode 1 Limit  
Error  
The EMC2300 automatically sets this bit to 1 when the temperature input  
measured by the Remote1- and Remote1+ is less than or equal to the  
limit set in the Remote Diode 1 Low Temp register or greater than the limit  
set in Remote Diode 1 High Temp register.  
5
6
Internal  
Sensor Limit  
Error  
R
R
R
0
0
0
The EMC2300 automatically sets this bit to 1 when the temperature input  
measured by the internal temperature sensor is less than or equal to the  
limit set in the Internal Low Temp register or greater than the limit set in  
the Internal High Temp register.  
Remote  
Diode 2 Limit  
Error  
The EMC2300 automatically sets this bit to 1 when the temperature input  
measured by the Remote2- and Remote2+ is less than or equal to the  
limit set in the Remote Diode 2 Low Temp register or greater than the limit  
set in the Remote Diode 1 High Temp register.  
7
INT2 Event  
Active  
The device automatically sets this bit to 1 when a status bit is set in the  
Interrupt Status Register 2.  
8.2.9  
Register 42h: Interrupt Status Register 2  
Table 8.15 Register 42h: Interrupt Status Register 2  
Register  
Address  
Read/  
Write  
Bit 7  
(MSb)  
Bit 0  
(LSb)  
Default  
Value  
Register Name  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
42h  
R-C  
(See  
Note  
8.10)  
Interrupt Status Register 2  
ERR2  
ERR1  
TACH4  
TACH3  
TACH2  
TACH1  
RES  
RES  
00h  
Note 8.10 This register is cleared on a read if no events are active.  
This register is read only – a write to this register has no effect.  
The Interrupt Status Register 2 bits are automatically set by the device whenever a remote temperature  
sensor error occurs, or a tach reading value is above the minimum value set in the tachometer  
minimum registers. The Interrupt Status Register 2 register holds a set bit until the event is read by  
software or until the individual interrupt enable bit is cleared (see Note below).  
The contents of this register are cleared (set to 0) automatically by the EMC2300 after it is read by  
software,, if the temperature sensor error no loner exists, or if the tach reading register is no longer  
above the minimum. Once set, the Interrupt Status Register 2 bits remain set until a read event occurs  
or until the individual interrupt enable bit is cleared, even if the voltage, Tach, or diode event no longer  
exists.  
The remote diode fault bits do not clear on a read while the fault condition exists. If the start bit is set  
when a fault condition occurs, 80h will be loaded into the associated temperature reading register,  
which will cause the associated diode limit error bit to be set (Remote Diode 1 Limit Error or Remote  
Diode 2 Limit Error) in addition to the diode fault bit. Disabling the enable bit for the diode will clear  
both the fault bit and the error bit for that diode (see Note below).  
This register is read only – a write to this register has no effect.  
Revision 0.2 (06-14-06)  
SMSC EMC2300  
DATA5S6HEET