Fan Control Device with High Frequency PWM and Temperature Monitors
Datasheet
bit (register 7Ch bit 2) is set, an individual status bit is set in one of the interrupt status
registers, and the corresponding group enable bit is set. Each interrupt event must be enabled
into the interrupt status registers, and the status bits must be enabled onto the INT# signal via
the group enable bits for each type of event (i.e., temperature, voltage and fan). See the
section titled Interrupt Status Registers on page 23.
SMSC EMC2300
Revision 0.2 (06-14-06)
DATA1S9HEET