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COM200221 参数 Datasheet PDF下载

COM200221图片预览
型号: COM200221
PDF下载: 下载PDF文件 查看货源
内容描述: 10 Mbps的ARCNET ( ANSI 878.1 )控制器2Kx8片上RAM [10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM]
分类和应用: 控制器
文件页数/大小: 82 页 / 509 K
品牌: SMSC [ SMSC CORPORATION ]
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10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM  
Datasheet  
EF=0  
Tx/Rx completed  
TA/RI bit  
Internal Setting Pulse  
nINTR pin  
prohibition period  
Tx/Rx completed  
EF=1  
TA/RI bit  
Internal Setting Pulse  
nINTR pin  
Figure 10.1 - Effect of the EF Bit on the TA/RI Bit  
The EF bit also controls the resolution of the following issues from the COM20020 Rev B:  
a) Network MAP Generation  
Tentative ID is used for generating the Network MAP, but it sometimes detects a non-existent node. Every  
time the Tentative-ID register is written, the effect of the old Tentative-ID remains active for a while, which  
results in an incorrect network map. It can be avoided by a carefully coded software routine, but this  
requires the programmer to have deep knowledge of how the COM20022I works. Duplicate-ID is mainly  
used for generating the Network MAP. This has the same issue as Tentative-ID.  
A minor logic change clears all the remaining effects of the old Tentative-ID and the old Duplicate-ID, when  
the COM20022I detects a write operation to Tentative-ID or Node-ID register. With this change,  
programmers can use the Tentative-ID or Duplicate-ID for generating the network MAP without any issues.  
This change is Enabled/Disabled by the EF bit.  
b) Mask Register Reset  
The Mask register is reset by a soft reset in the COM20020 Rev. A, but is not reset in Rev. B. The Mask  
register is related to the Status and Diagnostic register, so it should be reset by a soft reset. Otherwise,  
every time the soft reset happens, the COM20020 Rev. B generates an unnecessary interrupt since the  
status bits RI and TA are back to one by the soft reset.  
This is resolved by changing the logic to reset the Mask register both by the hard reset and by the soft  
reset. The soft reset is activated by the Node-ID register going to 00h or by the RESET bit going to High in  
the Configuration register. This solution is Enabled/Disabled by the EF bit.  
SMSC COM20022I  
Page 81  
Revision 09-27-07  
DATASHEET  
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