5 and 6 Channel Capacitive Touch Sensor
Datasheet
5.11 Calibration Activate Registers
Table 5.18 Calibration Activate Registers
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Calibration
Activate
26h
R/W
-
-
CS6_CAL
CS5_CAL
CS4_CAL
CS3_CAL
CS2_CAL
CS1_CAL
FFh
The Calibration Activate register force the respective sensors to be re-calibrated. When a bit is set,
the corresponding Capacitive Touch Sensor will be re-calibrated and the bit will be automatically
cleared once the re-calibration routine has finished. During the re-calibration routine, the sensors will
not detect a press for up to 600ms and the Sensor Base Count register values will be invalid. During
this time, any press on the corresponding sensors will invalidate the re-calibration.
Bit 5 - CS6_CAL - When set, the CS6 input is re-calibrated. This bit is automatically cleared once the
sensor has been re-calibrated successfully.
Bit 4 - CS5_CAL - When set, the CS5 input is re-calibrated. This bit is automatically cleared once the
sensor has been re-calibrated successfully.
Bit 3 - CS4_CAL - When set, the CS4 input is re-calibrated. This bit is automatically cleared once the
sensor has been re-calibrated successfully.
Bit 2 - CS3_CAL - When set, the CS3 input is re-calibrated. This bit is automatically cleared once the
sensor has been re-calibrated successfully.
Bit 1 - CS2_CAL - When set, the CS2 input is re-calibrated. This bit is automatically cleared once the
sensor has been re-calibrated successfully.
Bit 0 - CS1_CAL - When set, the CS1 input is re-calibrated. This bit is automatically cleared once the
sensor has been re-calibrated successfully.
5.12 Interrupt Enable Register
Table 5.19 Interrupt Enable Register
ADDR
27h
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
3Fh
Interrupt
Enable
CS6_
INT_EN
CS5_
INT_EN
CS4_
INT_EN
CS3_
INT_EN
CS2_
INT_EN
CS1_
INT_EN
R/W
-
-
The Interrupt Enable registers determine whether a sensor touch or release causes the interrupt pin
to be asserted.
Bit 5 - CS6_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS6
(associated with the CS6 status bit).
‘0’ - The interrupt pin will not be asserted if a touch is detected on CS6 (associated with the CS6
status bit).
‘1’ (default) - The interrupt pin will be asserted a touch is detected on CS6 (associated with the
CS6 status bit).
Bit 4 - CS5_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS5
(associated with the CS5 status bit).
Bit 3 - CS4_INT_EN - Enables the interrupt pin to be asserted if a touch is detected on CS4
(associated with the CS4 status bit).
Revision 1.1 (08-05-09)
SMSC CAP1005 / CAP1006
DATA3S8HEET
SMSC [ SMSC CORPORATION ]
