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CAP1006-2-AIA-TR 参数 Datasheet PDF下载

CAP1006-2-AIA-TR图片预览
型号: CAP1006-2-AIA-TR
PDF下载: 下载PDF文件 查看货源
内容描述: 5和6通道电容式触摸传感器 [5 and 6 Channel Capacitive Touch Sensor]
分类和应用: 模拟IC传感器信号电路
文件页数/大小: 53 页 / 736 K
品牌: SMSC [ SMSC CORPORATION ]
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5 and 6 Channel Capacitive Touch Sensor  
Datasheet  
3.4  
SPI Interface (CAP1005 only)  
The SMBus has a predefined packet structure, the SPI does not. The SPI Bus can operate in two  
modes of operation, normal 4-wire mode and bi-directional 3-wire mode. The CAP1005 only supports  
normal 4-wire mode. All SPI commands consist of 8-bit packets set to a specific slave device (identified  
by the CS pin).  
The SPI bus will latch data on the rising edge of the clock and the clock and data both idle high.  
All commands are supported via both operating modes. The supported commands are: Reset Serial  
interface, set address pointer, write command and read command. Note that all other codes received  
during the command phase are ignored and have no effect on the operation of the device.  
tP  
tHIGH  
tLOW  
SPI_CLK  
tFALL  
tRISE  
tSU:DAT  
SPI_MSIO or  
SPI_MOSI or  
tD:CLK  
tHD:DAT  
SPI_MISO  
Figure 3.1 SPI Timing  
3.4.1  
SPI Normal Mode  
In the normal mode of operation, there are dedicated input and output data lines. The host  
communicates by sending a command along the CAP1005 SPI_MOSI data line and reading data on  
the SPI_MISO data line. Both communications occur simultaneously which allows for larger through  
put of data transactions.  
All basic transfers consist of two 8 bit transactions from the Master device while the slave device is  
simultaneously sending data at the current address pointer value.  
Data writes consist of two or more 8-bit transactions. The host sends a specific write command  
followed by the data to write the address pointer. Data reads consist of one or more 8-bit transactions.  
The host sends the specific read data command and continues clocking for as many data bytes as it  
wishes to receive.  
3.4.2  
3.4.3  
SPI_CS# Pin  
The SPI Bus is a single master, multiple slave serial bus. Each slave has a dedicated CS pin (chip  
select) that the master asserts low to identify that the slave is being addressed. There are no formal  
addressing options.  
Address Pointer  
All data writes and reads are accessed from the current address pointer. In both Bi-directional mode  
and Full Duplex mode, the Address pointer is automatically incremented following every read  
command or every write command.  
SMSC CAP1005 / CAP1006  
Revision 1.1 (08-05-09)  
DATA1S7HEET