Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
PWM0 Clock Select 1, D0
The PWM0 Clock Select 1 bit, D0 is used with the PWM0 Clock Multiplier bit, D2, the PWM0 Clock
Select 0 bit, MBX92.7, and the Frequency Multiplier bits, MBXB0.0 and MBXB0.1, to determine the
PWM0 F
.
OUT
The affects of the PWM1 Clock Select [1:0] bits are shown in Table 18.1.
Table 18.8 PWM3 Control Register
0x99
MAILBOX
INDEX
0x7F96
8051
ADDRESS
VCC1
0x.4
POWER
DEFAULT
BIT
D7
D6
D5
D4
D3
D2
R/W
D1
R/W
D0
R/W
R
R
R
R
R
R
R
R
R
R
MBX TYPE
8051 R/W
R/W
R/W
R/W
Reserved Reserved Reserved Reserved
Reserved PWM3
STDBY
PWM3
CLOCK
MULTIP
LIER
PWM3
CLOCK
SELECT
1
BIT NAME
CLOCK
PROGRAMMER’S NOTE: The PWMx STDBY CLOCK bits, D4 and D5, should not be switched when PWRGD is
inactive; i.e., when VCC2 = 0V.
PWM3 STDBY Clock, D2
The PWM3 STDBY CLOCK bit, D2 is used to determine the PWM3 controller clock source.
When the PWM3 STDBY CLOCK bit = “1”, the PWM3 controller clock source is the 32.768kHz RTC
clock (VCC1/VCC2). The available PWM3 F
frequencies when D2 = “1” are shown in Table 18.1.
OUT
When the PWM3 STDBY CLOCK bit = “0”, the PWM3 controller clock source is the system clock
(VCC2). The available PWM3 F frequencies when D2 = “0” are shown in Table 18.1.
OUT
The PWM3 STDBY CLOCK bit default = “1”.
PWM3 Clock Multiplier, D1
The PWM3 Clock Multiplier bit, D1, is used with the PWM3 Clock Select 1 bit, D0, the PWM3 Clock
Select 0 bit, MBX98.7, and the Frequency Multiplier bits, MBXB3.0 and MBXB3.1, to determine the
PWM3 F
when the PWM3 STDBY CLOCK select bit is “0”.
OUT
When the PWM3 Clock Multiplier bit = “0”, no clock multiplier is used. When the PWM3 Clock Multiplier
bit = “1”, the clock speed determined by the PWM3 Clock Select [1:0] bits is doubled. See Table 18.1.
The PWM3 Clock Multiplier bit does not affect the PWM3 FOUT when the PWM3 STDBY CLOCK select
bit is “1”.
PWM3 Clock Select 1, D0
Revision 1.1 (01-14-03)
206
SMSC LPC47N350
DATASHEET
SMSC [ SMSC CORPORATION ]
