SL74HC4046
Phase-Locked Loop
High-Performance Silicon-Gate CMOS
The device inputs are compatible with standard CMOS outputs;
with pullup resistors, they are compatible with LS/ALSTTL outputs.
The SL74HC4046 phase-locked loop contains three phase
comparators, a voltage-controlled oscillator (VCO) and unity gain op-
amp DEMOUT. The comparators have two common signal inputs,
COMP , and SIG . Input SIG and COMP can be used directly
IN
IN
IN
IN
coupled to large voltage signals, or indirectly coupled (with a series
capacitor to small voltage signals). The self-bias circuit adjusts small
voltage signals in the linear region of the amplifier. Phase comparator 1
(an exclusive OR gate) provides a digital error signal PC1OUT and
maintains 90 degrees phase shift at the center frequency between SIG
IN
and COMP signals (both at 50% duty cycle). Phase comparator 2
(with leading-edge sensing logic) provides digital error signals PC2OUT
ORDERING INFORMATION
SL74HC4046N Plastic
IN
and PCPOUT and maintains a 0 degree phase shift between SIG and
SL74HC4046D SOIC
IN
COMPIN signals (duty cycle is immaterial). The linear VCO produces an
output signal VCOOUT whose frequency is determined by the voltage of
input VCOIN signal and the capacitor and resistors connected to pins
TA = -55° to 125° C for all packages
C1A, C1B, R1 and R2. The unity gain op-amp output DEMOUT with an external resistor is used where the VCOIN
signal is needed but no loading can be tolerated. The inhibit input, when high, disables the VCO and all on-amps
to minimize standby power consumption.
Applications include FM and FSK modulation and demodulation, frequency synthesis and multiplication,
frequency discrimination, tone decoding, data synchronization and conditioning, voltage-to-frequency
conversion and motor speed control.
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Low Power Consumption Characteristic of CMOS Device
Operating Speeds Similary to LS/ALSTTL
Wide Operating Voltage Range: 3.0 to 6.0 V
PIN ASSIGNMENT
Low Input Current: 1.0 mA Maximum (except SIG
and
IN
COMP )
IN
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Low Quiescent Current: 80 mA Maximum (VCO disabled)
High Noise Immunity Characteristic of CMOS Devices
Diode Protection on all Inputs
Pin No.
Symbol
PCPOUT
PC1OUT
Name and Function
Phase Comparator Pulse Output
Phase Comparator 1 Output
Comparator Input
1
2
3
COMP
IN
4
5
VCOOUT
INH
VCO Output
Inhibit Input
6
7
8
C1A
C1B
GND
Capacitor C1 Connection A
Capacitor C1 Connection B
Ground (0 V) VSS
9
VCO
VCO Input
IN
10
11
12
13
14
15
16
DEMOUT
R1
R2
PC2OUT
Demodulator Output
Resistor R1 Connection
Resistor R2 Connection
Phase Comparator 2 Output
Signal Input
SIG
IN
PC3OUT
VCC
Phase Comparator 3 Output
Positive Supply Voltage
System Logic
SLS
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
