ST7781
11.1.12 Power Control 1 (R10h)
Power Control 1 (R10h)
RS
/WR
/RD D15 D14 D13 D12 D11 D10
D9
BT1
0
D8
BT0
0
D7
APE
0
D6
AP2
0
D5
AP1
0
D4 D3
D2
0
D1
STB
0
D0
0
0
0
0
0
0
0
SAP
0
0
0
BT2
0
AP0
0
0
0
1
↑
1
0
0
Default value
SAP: Source Driver output control
SAP=”0”, Source driver is disabled.
SAP=”1”, Source driver is enabled.
When starting the charge-pump of LCD in the Power ON stage, make sure that SAP=”0”, and set the SAP=”1”,
after starting up the LCD power supply circuit.
BT [2:0]: Sets the factor used in the step-up circuits.
Select the optimal step-up factor for the operating voltage. To reduce power consumption, set a smaller
factor.
BT[2:0]
AVDD
VCL
VGH
VGL
0
1
2
3
4
5
6
7
Vci1X2
-Vci1
-Vci1X5
-Vci1X4
-Vci1X3
-Vci1X5
-Vci1X4
-Vci1X3
-Vci1X4
-Vci1X3
Vci1X6
Vci1X2
Vci1X2
Vci1X2
-Vci1
-Vci1
-Vci1
Vci1X5
Vci1X4
Note1: Connect capacitors to the capacitor connection pins when generating AVDD, VGH, VGL and VCL
levels.
Note2: Make sure AVDD = 6.0V (max.), VGH = 15.0V (max.), VGL = – 12.5V (max) and VCL= -3.0V (max.)
Description
APE: Power supply enable bit. Set APE = “1” to start generation of power supply according to the power supply
startup sequence.
AP [2:0]: Adjusts the constant current in the operational amplifier circuit in the LCD power supply circuit. The larger
constant current enhances the drivability of the LCD, but it also increases the current consumption. Adjust
the constant current taking the trade-off into account between the display quality and the current
consumption. In no-display period, set AP[2:0]= “000” to halt the operational amplifier circuits and the
step-up circuits to reduce current consumption.
AP[2:0]
000
Gamma Driver Amplifier
Source Driver Amplifier
Halt
Halt
001
1.5
1.5
010
1.25
1.25
011
1.00
1.00
100
101
0.75
0.5
0.75
0.5
110
0.25
0.25
111
Setting Prohibited
Setting Prohibited
STB: When STB = “1”, ST7781 enters the standby mode and the display operation stops except the DRAM power
supply to reduce the power consumption. No change to the DRAM data and instruction setting is accepted and
he DRAM data and the instruction setting are maintained in STB mode.
Ver. 1.7
54