ST7669V
7 FUNCTIONAL DESCRIPTION
7.1 MICROPROCESSOR INTERFACE
Chip Select Input
/CS pin is for chip selection. The ST7669V is active when /CS=L. In serial interface mode, the internal shift register and the
counter are reset when /CS=H.
7.1.1 Selecting Parallel / Serial Interface
ST7669V has eight types of interface with an MPU, which are two serial and six parallel interfaces. This parallel or serial
interface is determined by IF pin as shown in Table 7.1-1.
Table 7.1-1Parallel / Serial Interface Mode
I/F Mode
Pin Assignment
I/F Description
IF3 IF2 IF1
/CS
/CS
/CS
/CS
/CS
/CS
/CS
/CS
A0
A0
E_RD RW_WR Used Data Bus
D1
D1
D1
D1
D1
D1
D1
A0
D0
D0
D0
D0
D0
D0
D0
SI
H
H
L
H
H
L
L
H
H
L
80 serial 8-bit parallel
80 serial 16-bit parallel
80 serial 18-bit parallel
68 serial 8-bit parallel
68 serial 16-bit parallel
68 serial 18-bit parallel
8-bit SPI mode (4 line)
/RD
/RD
/RD
E
/WR
/WR
/WR
R/W
R/W
R/W
--
D7~D2
D15~D2
D17~D2
D7~D2
D15~D2
D17~D2
--
A0
A0
H
H
L
L
A0
L
H
L
A0
E
L
A0
E
L
H
H
SCL
--
L
H
L
9-bit SPI mode (3 line)
/CS
SCL
--
--
--
---
SI
NOTE: When these pins are set to any other combination, A0, E_RD and RW_WR inputs are disabled and D0 to D17 are
to be high impedance.
7.1.2 8-bit or 16-bit Parallel Interface
The ST7669V identifies the type of the data bus signals according to the combination of A0, /RD (E) and /WR (W/R) signals,
as shown in Table 7.1-2.
Table 7.1-2Parallel Data Transfer
Common
6800-series
8080-series
/WR
Description
A0
H
R/W
H
E
/RD
↓
↓
H
↑
↑
↓
↓
H
H
Display data read out
Register status read
Instruction write
H
H
↑
↑
L
L
H
L
H
Display data write
Ver 1.3
20/208
6/4/2008
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
