ST7558
6. FUNCTIONS DESCRIPTION
MICROPROCESSOR INTERFACE
Chip Select Input
There is CSB pin for chip selection. The ST7558 can interface with an MPU when CSB is "L". When CSB is “H”, these pins
are set to any other combination, A0, /RD(E), and /WR(R/W) inputs are disabled and D0 to D7 are to be high impedance.
And, in case of serial interface, the internal shift register and the counter are reset.
Parallel / Serial Interface
ST7558 has four types of interface with an MPU, which are two serial and two parallel interfaces. This parallel or serial
interface is determined by P/S pin as shown in table 1.
Table 1. Parallel/Serial Interface Mode
Type
P/S
IMS
H
CSB
Interface mode
6800-series MPU interface
8080-series MPU interface
Parallel
H
CSB
L
H
L
CSB 4-pin SPI interface
---
Serial
L
I2C interface
Parallel Interface (P/S = "H")
The 8-bit bi-directional data bus is used in parallel interface and the type of MPU is selected by IMS as shown in table 2.
The type of data transfer is determined by signals at A0, /RD (E) and /WR(R/W) as shown in table 3.
Table 2. Microprocessor Selection for Parallel Interface
IMS CSB
A0
A0
A0
/RD (E) /WR (R/W) DB0 to DB7
MPU bus
H
L
CSB
CSB
E
R/W
/WR
DB0 to DB7 6800-series
DB0 to DB7 8080-series
/RD
Table 3. Parallel Data Transfer
8080-series
Common
6800-series
Description
E
(/RD)
H
H
H
R/W
(/WR)
H
L
H
L
/RD
(E)
L
H
L
/WR
(R/W)
H
L
H
RS
H
H
L
Display data read out
Display data write
Register status read
L
H
H
L
Writes to internal register (instruction)
NOTE: When /RD (E) pin is always pulled high for 6800-series interface, it can be used CSB for enable signal. In this case,
interface data is latched at the rising edge of CSB and the type of data transfer is determined by signals at A0, /WR(R/W)
as in case of 6800-series mode.
Serial Interface (P/S=" L ")
Serial Mode
4-line SPI interface
P/S
L
IMS
H
CSB
CSB
A0
Used
Description
Write only
Not Used
Fix to “H”
Not Used
Fix to “H”
I2C interface
L
L
Write only
IMS=” L “, P/S=” H “: 4-line SPI interface
When the ST7558 is active (CSB=”L”), serial data (D6) and serial clock (D7) inputs are enabled. And not active, the internal
8-bit shift register and the 3-bit counter are reset. The display data/command indication may be controlled either via
software or the Register Select (A0) Pin, based on the setting of P/S. When the A0 pin is used (IMS = “H”), data is display
data when A0 is high, and command data when A0 is low. When A0 is not used (IMS = “L”), the LCD Driver will receive
command from MCU by default. If messages on the data pin are data rather than command, MCU should send Data
direction command to control the data direction and then one more command to define the number of data bytes will be
write. After these two continuous commands are sending, the following messages will be data rather than command. Serial
data can be read on the rising edge of serial clock going into D7 and processed as 8-bit parallel data on the eighth serial
clock. And the DDRAM column address pointer will be increased by one automatically. The next bytes after the display
data string are handled as command data.
Ver 2.3
15/56
2005/10/05
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
