ST2202A
3. SIGNAL DESCRIPTIONS
TABLE 3-1 Signal Function Groups
Function Group
Pad No.
Designation
Description
VCC:ꢀPowerꢀsupplyꢀforꢀsystemꢀ
17,ꢀ52,ꢀ
90ꢀ
Powerꢀ
VCCꢀ,ꢀPVCCꢀ
PVCC:ꢀPowerꢀsupplyꢀforꢀPSGOꢀandꢀPSGOBꢀ
GND:ꢀSystemꢀpowerꢀgroundꢀ
22,ꢀ48,ꢀ
49,ꢀ71ꢀ
Groundꢀ
GNDꢀ,ꢀPGNDꢀ
PGND:ꢀPowerꢀgroundꢀforꢀPSGOꢀandꢀPSGOBꢀ
RESET:ꢀActiveꢀlowꢀsystemꢀresetꢀsignalꢀinputꢀ
TEST1/2:ꢀLeaveꢀthemꢀopenꢀwhenꢀnormalꢀoperationꢀ
MMD/CS0: Memoryꢀmodesꢀselectionꢀpin
Normal mode:ꢀEnableꢀinternalꢀROM.ꢀ
15,ꢀ
,ꢀTEST1/2ꢀ
RESET
MMD/
Systemꢀcontrolꢀ
1,ꢀ77,ꢀ
26ꢀ
MMD/
ꢀ connectsꢀtoꢀGND.
CS0
Emulation mode: DisableꢀinternalꢀROM.ꢀ
MMD/ ꢀ connectsꢀtoꢀchipꢁselectꢀpinꢀofꢀexternalꢀROM.ꢀ
ꢀ
CS0
CS0
OneꢀresistorꢀshouldꢀbeꢀaddedꢀbetweenꢀVCCꢀandꢀthisꢀpin.ꢀ
Afterꢀresetꢀcycles,ꢀMMD/ ꢀ changesꢀtoꢀbeꢀanꢀoutput,ꢀandꢀ
CS0
outputsꢀsignalꢀ
.
CS0
XMD:ꢀHighꢀfrequencyꢀoscillatorꢀ(OSC)ꢀmodeꢀselectionꢀinputꢀ
Low:ꢀCrystalꢀmode.ꢀOneꢀcrystalꢀorꢀresonatorꢀshouldꢀbeꢀ
connectedꢀbetweenꢀOSCIꢀandꢀXIOꢀ
16,ꢀ
18~21ꢀ
OSCXO,ꢀOSCXI,ꢀOSCI,ꢀ
XIO,ꢀXMDꢀ
Clockꢀ
High:ꢀResistorꢀoscillatorꢀmode.ꢀOneꢀresistorꢀshouldꢀbeꢀ
connectedꢀbetweenꢀOSCIꢀandꢀVCCꢀ
OSCXI, OSCXO:ꢀConnectꢀoneꢀ32768Hzꢀcrystalꢀbetweenꢀtheseꢀ
twoꢀpinsꢀwhenꢀusingꢀlowꢀfrequencyꢀoscillatorꢀ
69,ꢀ70ꢀ
2~4,ꢀ
WR ,ꢀ RD ꢀ
A[22:0]ꢀ
ExternalꢀmemoryꢀR/Wꢀcontrolꢀsignalsꢀ
Externalꢀmemoryꢀaddressꢀbusꢀ
Externalꢀmemoryꢀ
busꢀsignalsꢀ
81~89,ꢀ
91~101ꢀ
72~76,ꢀ
78~80ꢀ
Externalꢀmemoryꢀdataꢀbusꢀ
D[7:0]ꢀ
PSG/PWMꢀDACꢀ
Keyboardꢀscanꢀ
50,ꢀ51ꢀ
PSGO,ꢀPSGOBꢀ
PA7~0ꢀ
PSGꢀoutputs.ꢀConnectꢀtoꢀoneꢀbuzzerꢀorꢀspeakerꢀ
I/OꢀportꢀAꢀ
23~25,ꢀ
signalꢀ(returnꢀline)ꢀ 27~31ꢀ
GPIOꢀ
32~39ꢀ
61~66ꢀ
PB7~0ꢀ
I/OꢀportꢀB
/A23/PD5ꢀ,ꢀ
I/OꢀportꢀDꢀandꢀchipꢁselectꢀoutputsꢀ
CS6
Chipꢀselectsꢀ
/PD4~0ꢀ
CS5 ~ 1
RXD0/PC7ꢀ,ꢀ
UARTꢀsignalsꢀandꢀI/Osꢀ
SPIꢀsignalsꢀandꢀI/Osꢀ
46,ꢀ47,ꢀ
67,ꢀ68ꢀ
UARTꢀ
SPIꢀ
TXD0/PC6ꢀ,ꢀ
RXD1/PD7ꢀ,ꢀTXD1/PD6ꢀ
/PC5ꢀ,ꢀ
DATA_READY
/PC4ꢀ,ꢀSDO/PC3ꢀ,ꢀ
41~45ꢀ
SS
SDI/PC2ꢀ,ꢀSCK/PC1ꢀ
ꢀ
Verꢀ2.5ꢀ
3/75
ꢀ
9/16/2008ꢀ
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
