STK10C68-M
a
ABSOLUTE MAXIMUM RATINGS
Voltage on typical input relative to VSS. . . . . . . . . . . . . –0.6V to 7.0V Note a: Stresses greater than those listed under "Absolute Maximum
Voltage on DQ0-7 and G. . . . . . . . . . . . . . . . . . .–0.5V to (VCC+0.5V)
Temperature under bias . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
Storage temperature. . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1W
Ratings" may cause permanent damage to the device. This is a stress
rating only, and functional operation of the device at conditions above
those indicated in the operational sections of this specification is not
implied. Exposuretoabsolutemaximumratingconditionsforextended
DC output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15mA periods may affect reliability.
(One output at a time, one second duration)
DC CHARACTERISTICS
(V = 5.0V ± 10%)
CC
SYMBOL
PARAMETER
MIN
MAX
UNITS
NOTES
b
I
Average V Current
CC
90
85
80
50
mA
mA
mA
mA
t
t
t
= 35ns
= 45ns
= 55ns
CC
1
AVAV
AVAV
AVAV
d
I
Average V Current
CC
E ≥ (V – 0.2V)
CC
2
CC
during STORE cycle
all others V ≤ 0.2V or ≥ (V – 0.2V)
IN
CC
c
I
Average V Current
CC
27
23
20
mA
mA
mA
t
t
t
= 35ns
SB
1
AVAV
AVAV
AVAV
(Standby, Cycling TTL Input Levels)
= 45ns
= 55ns
E ≥ V ; all others cycling
IH
c
I
Average V Current
CC
2
mA
µA
µA
E ≥ (V – 0.2V)
SB
2
CC
(Standby, Stable CMOS Input Levels)
Input Leakage Current (Any Input)
all others V ≤ 0.2V or ≥ (V – 0.2V)
IN CC
I
±1
±5
V
V
V
V
= max
CC
ILK
= V to V
SS
IN
CC
I
Off State Output Leakage Current
= max
CC
OLK
= V to V
IN
SS
CC
V
Input Logic "1" Voltage
Input Logic "0" Voltage
Output Logic "1" Voltage
Output Logic "0" Voltage
Operating Temperature
2.2
V
+.5
V
V
All Inputs
All Inputs
IH
CC
V
IL
V
–.5
0.8
SS
V
2.4
V
I
I
= –4mA
OH
OUT
OUT
V
0.4
V
= 8mA
OL
T
A
–55
125
°C
Note b: I
is dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded.
CC
1
Note c: Bringing E ≥ V will not produce standby current levels until any nonvolatile cycle in progress has timed out. See MODE SELECTION table.
IH
Note d: I
is the average current required for the duration of the store cycle (t
) after the sequence (t ) that initiates the cycle.
STORE WC
CC
2
AC TEST CONDITIONS
Input Pulse Levels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSS to 3V
Input Rise and Fall Times. . . . . . . . . . . . . . . . . . . . . . . . . . ≤ 5ns
Input and Output Timing Reference Levels. . . . . . . . . . . . . . 1.5V
Output Load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Figure 1
5.0V
480 Ohms
Output
CAPACITANCEe (T =25°C, f=1.0MHz)
30pF
A
INCLUDING
SCOPE
255 Ohms
SYMBOL
PARAMETER
Input Capacitance
Output Capacitance
MAX
UNITS
pF
CONDITIONS
∆V = 0 to 3V
∆V = 0 to 3V
AND FIXTURE
C
5
7
IN
C
pF
OUT
Figure 1: AC Output Loading
Note e: These parameters are guaranteed but not tested.
4-12