STK11C68-M
STORE/RECALL CYCLE
(VCC = 5.0V ± 10%)
SYMBOLS
NO.
STK11C68-35M
STK11C68-45M
STK11C68-55M
UNITS
PARAMETER
#1
Alt.
MIN
MAX
MIN
MAX
MIN
MAX
22
23
24
25
26
27
28
t
t
t
t
t
t
t
t
STORE/RECALL Initiation Cycle Time
Chip Enable to Output Inactive
STORE Cycle Time
35
45
55
ns
ns
ms
µs
ns
ns
ns
AVAV
RC
p
75
10
20
75
10
20
85
10
20
ELQZ
q
t
t
t
t
t
ELQXS
ELQXR
STORE
r
RECALL Cycle Time
RECALL
AE
s
Address Set-up to Chip Enable
Chip Enable Pulse Width
0
25
0
0
35
0
0
45
0
AVELN
ELEHN
s,t
s
EP
Chip Disable to Address Change
EHAXN
EA
Note p: Once the software STORE or RECALL cycle is initiated, it completes automatically, ignoring all inputs.
Note q: Note that STORE cycles (but not RECALLs) are aborted by V < 4.0V (STORE inhibit).
CC
Note r: A RECALL cycle is initiated automatically at power up when V exceeds 4.0V. t
is measured from the point at which V exceeds 4.5V.
CC
CC
RECALL
Note s: Noise on the E pin may trigger multiple read cycles from the same address and abort the address sequence.
Note t: If the Chip Enable Pulse Width is less than t (see READ CYCLE #2) but greater than or equal to t , then the data may not be valid at the end of
ELQV
ELEHN
the low pulse, however the STORE or RECALL will still be initiated.
Note u: W must be HIGH when E is LOW during the address sequence in order to initiate a nonvolatile cycle. G may be either HIGH or LOW throughout.
Addresses #1 through #6 are found in the MODE SELECTION table. Address #6 determines whether the STK11C68-M performs a STORE or RECALL.
Note v: E must be used to clock in the address sequence for the Software STORE and RECALL cycles.
u,v
STORE/RECALL CYCLE
22
AVAV
22
t
t
AVAV
ADDRESS
E
ADDRESS #6
ADDRESS #1
26
AVELN
27
28
t
t
t
EHAXN
ELEHN
24
STORE
25
t
t
RECALL
23
ELQZ
t
HIGH IMPEDANCE
DATA OUT
DATA VALID
DATA VALID
4-37
SIMTEK [ SIMTEK CORPORATION ]
