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SII3114CTU 参数 Datasheet PDF下载

SII3114CTU图片预览
型号: SII3114CTU
PDF下载: 下载PDF文件 查看货源
内容描述: PCI串行ATA控制器 [PCI to Serial ATA Controller]
分类和应用: 外围集成电路控制器PC时钟
文件页数/大小: 127 页 / 559 K
品牌: SILICONIMAGE [ Silicon image ]
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SiI3114 PCI to Serial ATA Controller  
Data Sheet  
Silicon Image, Inc.  
If enabled, a PMACK will be sent to the device; if not enabled, a PMNAK will be sent. When the request is  
received and its acknowledgement is enabled, Slumber mode is entered.  
Slumber mode status is reported in both the SStatus register (‘0110’ in the IPM field) and the SMisc register (bit  
5).  
Slumber mode is cleared by setting the ComWake bit in the Smisc register. This will send a COMWAKE signal to  
the device through the Serial ATA link to initiate a Slumber to On sequence. Slumber mode can also be cleared  
through receipt of OOB signals from the device.  
Hot Plug Support  
The state diagram below illustrates the logic to support Hot Plugging.  
CR  
PhyRdy  
Periodically send ComReset  
until ComInit received  
Normal operation  
dp_phyrdy=0  
dp_phyrdy=1  
go_to_CR  
Figure 10. Hot Plug Logic State Diagram  
The go_to_CRsignal is generated by a timer if the internal logic fails to detect valid signals from the Serial ATA  
wire for 200 ns. Logic behavior is as follows:  
1. Initial power-up – A ComReset is generated during initial power up. If a device is present and operational,  
the PhyRdy state will be entered. If a device is not present or not responding, the CR state will be entered  
and ComReset will be generated every 100 ms.  
2. Device is unplugged – The internal logic detects that no more signal is present on the Serial ATA wire.  
The timer will expire after 200 ns and go_to_CRwill be asserted; the CR state will be entered and  
ComReset will be generated every 100 ms. The internal PHYRDY signal will go false causing an interrupt  
to the host driver (PHYRDY change interrupt, bit 16 of SError register; enabled by bit 16 of SIEN register).  
3. Device is plugged in – The device will respond to the ComReset with a ComInit. Normal operation will  
commence and the internal logic will detect a PHYRDY signal going true causing an interrupt to the host  
driver (PHYRDY change interrupt, bit 16 of SError register; enabled by bit 16 of SIEN register).  
SiI-DS-0103-D  
84  
© 2007 Silicon Image, Inc.  
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