SiI 1151 PanelLink Receiver
Data Sheet
Q[23:0]
Q[23:0]
DE
Q[47:23]
ODCK
10pF
DE
ODCK
Figure 3. Output Loading in SiI 151B Mode
SiI 1151 (Programmable) Mode DC Specifications
The SiI 1151 provides an internal register, accessible via I2C, to match the drive strengths of the output data,
control and ODCK pins. This arrangement allows more flexibility in driving diverse loading configurations as
shown in Figure 4.
ODCK, DE
Q[n],HS,VS
ODCK,
DE
Q[n],
HS,VS
ST=1 and CKST#=0
ST=1 for load = 10pF
for load = 20pF
Always on settings:
Minimum load = 5pF
ST=0 and CKST#=1 or
ST=1 and CKST#=0
for load = 10pF
Always on settings:
Minimum load = 5pF
Figure 4. SiI 1151 Mode Control of Output Pin Drive Strength
9
SiI-DS-0023-C
SILICONIMAGE [ Silicon image ]
