Si3220/Si3225
If the CMHITH (RAM 36) threshold is exceeded, the
CMH bit is 1, and I is forced to zero in the
Table 23. Three-Battery Switching Components
Q1
FORWARD-ACTIVE and TIP-OPEN states, or I
is
Q2
Component
Value
Comments
forced to zero in the REVERSE-ACTIVE and RING-
OPEN states. The other currents in the equation are
D1
Q1
200 V, 200 mA
100 V PNP
1N4003 or similar
allowed to contribute normally to the I
value.
LOOP
CXT5401 or
similar
The conditioning due to the CMH bit (LCRRTP Register)
and LFS field (LINEFEED Register) states can be
summarized as follows:
ꢀ IQ1 = 0 if (CMH = 1 AND (LFS = 1 OR LFS = 3))
ꢀ IQ2 = 0 if (CMH = 1 AND (LFS = 5 OR LFS = 7))
The output of the ISP is the input to a programmable
digital low-pass filter, which removes unwanted ac
signal components before threshold detection.
Q2
100 V NPN
CXT5551 or
similar
R101
1/10 W, ± 5%
2.4 kΩ for
V
=3.3 V
DD
3.9 kΩ for
=5 V
V
DD
R102
R103
10 kΩ,1/10 W, ± 5%
402 kΩ,1/10 W,± 1%
The low-pass filter coefficient is calculated using the
following equation and is entered into the LCRLPF RAM
location:
3
Loop Closure Detection
LCRLPF = [(2πf x 4096)/800] x 2
Loop closure detection is required to accurately signal a
terminal device going off-hook during the Active, On-
Hook Transmission (forward or reverse polarity), and
ringing linefeed states. The functional blocks required to
implement a loop closure detector are shown in
Figure 21, and the register set for detecting a loop
closure event is provided in Table 24. The primary input
to the system is the loop current sense value from the
voltage/current/power monitoring circuitry and is
Where f = the desired cutoff frequency of the filter.
The programmable range of the filter is from 0h (blocks
all signals) to 4000h (unfiltered). A typical value of 10
(0A10h) is sufficient to filter out any unwanted ac
artifacts while allowing the dc information to pass
through the filter.
The output of the low-pass filter is compared to a
programmable threshold, LCROFFHK. Hysteresis is
enabled by programming
a
second threshold,
reported in the I
RAM address.
LOOP
LCRONHK, to detect the loop going to an open or on-
hook state. The threshold comparator output feeds a
programmable debounce filter. The output of the
debounce filter remains in its present state unless the
input remains in the opposite state for the entire period
of time programmed by the loop closure debounce
interval, LCRDBI. There is also a loop closure mask
interval, LCRMASK, that is used to mask transients
caused when an internal ringing burst (with no offset)
ends in the presence of a high REN load. If the
debounce interval has been satisfied, the LCR bit is set
to indicate that a valid loop closure has occurred.
The loop current (I
) is computed by the ISP using
LOOP
the equations shown below. Refer to Figure 18 on page
36 for the discrete bipolar transistor references) used in
the equation below (Q1, Q2, Q5 and Q6 – note that the
Si3200 has corresponding MOS transistors). The same
I
equation applies to the discrete bipolar linefeed
LOOP
as well as the Si3200 linefeed device. The following
equation is conditioned by the CMH status bit in register
LCRRTP and by the linefeed state as indicated by the
LFS field in the LINEFEED register.
Iloop = IQ1 – IQ6 + IQ5 – IQ2 in TIP-OPEN or RING-OPEN
I
Q1 – IQ6 + IQ5 – IQ2
---------------------------------------------------
=
in all other states
2
IQ1
IQ2
IQ5
IQ6
Input
Signal
ILOOP
Digital
LPF
+
–
Loop
Debounce
Processor
LCR
Closure
Mask
Filter
LCRLPF
CMH LFS
Interrupt
Logic
LCRMASK
LCRDBI
LOOPS
Loop Closure
Threshold
LOOPE
LCROFFHK
LCRONHK
Figure 21. Loop Closure Detection Circuitry
42
Rev. 1.0
SILICONIMAGE [ Silicon image ]
