SiM3C1xx
Table 5.2. Pin Definitions and alternate functions for SiM3C1x6 (Continued)
Pin Name
Type
PB3.2
5 V Tolerant I/O
14
13
XBR1
XBR1
AD0m/
D0
DAC0T0
DAC1T0
LPT0T0
WAKE.8
CMP0P.2
CMP1P.2
PB3.3
5 V Tolerant I/O
WR
DAC0T1
DAC1T1
INT0.4
CMP0N.2
CMP1N.2
INT1.4
WAKE.9
PB3.4
PB3.5
5 V Tolerant I/O
5 V Tolerant I/O
12
11
XBR1
XBR1
OE
INT0.5
INT1.5
WAKE.10
CMP0P.3
CMP1P.3
ALEm
DAC0T2
DAC1T2
INT0.6
CMP0N.3
CMP1N.3
INT1.6
WAKE.11
PB3.6
PB3.7
PB3.8
5 V Tolerant I/O
5 V Tolerant I/O
5 V Tolerant I/O
10
9
XBR1
XBR1
XBR1
CS0
BE1
CS1
DAC0T3
DAC1T3
INT0.7
INT1.7
WAKE.12
CMP0P.4
CMP1P.4
EXREGSP
DAC0T4
DAC1T4
INT0.8
INT1.8
WAKE.13
CMP0N.4
CMP1N.4
EXREGSN
8
DAC0T5
DAC1T5
LPT0T1
INT0.9
CMP0P.5
CMP1P.5
EXREGOUT
INT1.9
WAKE.14
62
Preliminary Rev. 0.8
SILICON [ SILICON ]
