SiM3C1xx
Table 5.3. Pin Definitions and alternate functions for SiM3C1x4 (Continued)
Pin Name
Type
PB0.8
Standard I/O
26
25
XBR0
XBR0
ADC0.14
ADC1.14
PB0.9
Standard I/O
ADC0.15
ADC1.15
PB0.10
PB0.11
PB0.12
Standard I/O
Standard I/O
Standard I/O
22
21
20
XBR0
XBR0
XBR0
DMA0T1
DMA0T0
ADC1.8
ADC1.7
ADC0T15
WAKE.0
ADC1.5
CS0.10
PB0.13
PB0.14
PB0.15
PB1.0
Standard I/O
Standard I/O
Standard I/O
Standard I/O
Standard I/O
19
18
17
16
15
XBR0
XBR0
XBR0
XBR0
XBR0
ADC1T15
WAKE.1
ADC1.4
CS0.11
WAKE.2
WAKE.3
WAKE.4
WAKE.5
ADC1.3
CS0.12
ADC1.2
CS0.13
ADC1.1
CS0.14
PB1.1
ADC1.0
CS0.15
PMU_Asleep
PB1.2
Standard I/O
12
XBR0
CMP0N.0
CMP1N.0
RTC0OSC_OUT
PB1.3
PB3.0
Standard I/O
11
10
XBR0
XBR1
CMP0P.0
CMP1P.0
5 V Tolerant I/O
DAC0T0
DAC1T0
LPT0T0
INT0.0
CMP0P.1
CMP1P.1
EXREGSP
INT1.0
WAKE.12
66
Preliminary Rev. 0.8
SILICON [ SILICON ]
