SiM3C1xx
D1
A48
D5
A47
A46
A45
A44
A43
A42
A41
A40
A39
A38
A37
D8
D4
PB4.5
PB4.4
PB4.3
VIOHD
PB4.2
PB4.1
PB4.0
PB3.8
PB3.6
PB3.4
PB3.2
PB3.1
PB3.0
A1
A2
B36
B35
B34
B33
B32
B31
B30
B29
B28
A36
A35
A34
A33
A32
A31
A30
A29
A28
A27
A26
A25
D3
PB0.12
PB0.13
PB0.15
PB1.0
B1
B2
B3
B4
B5
B6
B7
B8
B9
B27
B26
B25
B24
B23
B22
B21
B20
B19
PB0.14
A3
VSSHD
PB3.11
PB3.10
PB3.9
PB3.7
PB3.5
PB3.3
A4
PB1.1
PB1.3*
PB1.5*
PB1.7*
PB1.8*
A5
PB1.2*
PB1.4*
A6
92 pin LGA
(Top View)
A7
PB1.6*
VIO
A8
A9
PB1.9*
SWDIO*
PB1.10
PB1.11
PB1.12
VSS
SWCLK*
A10
A11
A12
D2
D6
B10
B11
B12
B13
B14
B15
B16
B17
B18
D7
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
*Noted pins are listed in the pinout table and 80-pin TQFP package figure with additional names.
These alternate functions are also present on the 92-pin LGA package and are identical to those on the
80-pin TQFP package.
Figure 5.2. SiM3C1x7-GM Pinout
50
Preliminary Rev. 0.8
SILICON [ SILICON ]
