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SI4020 参数 Datasheet PDF下载

SI4020图片预览
型号: SI4020
PDF下载: 下载PDF文件 查看货源
内容描述: 完全集成( IOW BOM ,易于设计的)无生产快速稳定所需的对齐方式,可编程,高清晰度PLL [Fully integrated (Iow BOM, easy design-in) No alignment required in production Fast settling, programmable, high-resolution PLL]
分类和应用:
文件页数/大小: 32 页 / 1064 K
品牌: SILICON [ SILICON ]
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Si4020  
CONTROL INTERFACE  
Commands to the transmitters are sent serially. Data bits on pin SDI are shifted into the device upon the rising edge of the clock on  
pin SCK whenever the chip select pin nSEL is low. When the nSEL signal is high, it initializes the serial interface. The number of bits  
sent is an integer multiple of 8. All commands consist of a command code, followed by a varying number of parameter or data bits.  
All data are sent MSB first (e.g. bit 15 for a 16-bit command). Bits having no influence (don’t care) are indicated with X. The Power  
On Reset (POR) circuit sets default values in all control and command registers.  
Timing Specification  
Symbol  
tCH  
Parameter  
Minimum value [ns]  
Clock high time  
25  
25  
10  
10  
25  
5
tCL  
Clock low time  
tSS  
Select setup time (nSEL falling edge to SCK rising edge)  
Select hold time (SCK falling edge to nSEL rising edge)  
Select high time  
tSH  
tSHI  
tDS  
Data setup time (SDI transition to SCK rising edge)  
Data hold time (SCK rising edge to SDI transition)  
Data delay time  
tDH  
5
tOD  
10  
25  
tBL  
Push-button input low time  
Timing Diagram  
tSHI  
tSS  
nSEL  
tCH  
tCL  
tOD  
tSH  
SCK  
tDS  
tDH  
BIT15  
BIT14  
BIT13  
BIT8  
BIT7  
BIT1  
BIT0  
SDI  
POR  
WK-UP  
nIRQ  
nIRQ  
12  
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