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SI4020 参数 Datasheet PDF下载

SI4020图片预览
型号: SI4020
PDF下载: 下载PDF文件 查看货源
内容描述: 完全集成( IOW BOM ,易于设计的)无生产快速稳定所需的对齐方式,可编程,高清晰度PLL [Fully integrated (Iow BOM, easy design-in) No alignment required in production Fast settling, programmable, high-resolution PLL]
分类和应用:
文件页数/大小: 32 页 / 1064 K
品牌: SILICON [ SILICON ]
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Si4020  
3. Frequency Setting Command  
bit  
15  
1
14  
0
13  
1
12  
0
11  
10  
9
8
7
6
5
4
3
2
1
0
POR  
f11 f10  
f9  
f8  
f7  
f6  
f5  
f4  
f3  
f2  
f1  
f0  
A7D0h  
The 12-bit parameter of the Frequency Setting Command  
<f11 : f0> has the value F. The value F should be in the range  
of 96 and 3903. When F is out of range, the previous value is  
kept. The synthesizer center frequency f0 can be calculated as:  
The constants C1 and C2 are determined by  
the selected band as:  
Band [MHz]  
315  
C1  
1
C2  
31  
43  
43  
30  
f0 = 10 MHz * C1 * (C2 + F/4000)  
433  
1
868  
2
915  
3
Note:  
For correct operation of the frequency synthesizer, the frequency and band of operation need to be programmed before the  
synthesizer is started. Directly after activation of the synthesizer, the RF VCO is calibrated to ensure proper operation in the  
programmed frequency band.  
When coding for the Si4020, it is suggested that recalibration routines be added to compensate for significant changes in  
temperature and supply voltages.  
4. Data Rate Command  
bit  
15  
1
14  
1
13  
0
12  
0
11  
1
10  
0
9
0
8
0
7
6
5
4
3
2
1
0
POR  
r7  
r6  
r5  
r4  
r3  
r2  
r1  
r0  
C800h  
In EEPROM mode the transmitted bit rate is determined by the 8-bit value R (bits <r7 : r0>) as:  
BR = 10 MHz / 29 / (R+1)  
Apart from setting custom values, the standard bit rates from 2.4 to 115.2 kbps can be approximated with minimal error.  
The commands are read out with a different fixed bit rate:  
Fsck = 10 MHz / 29 / 3 [~115.2 kHz]  
5. Power Setting Command  
bit  
7
1
6
0
5
1
4
1
3
2
1
0
POR  
B0h  
ook  
p2  
p1  
p0  
The bit ook enables the OOK mode for the PA, in this case the data to be transmitted are received through the FSK pin.  
p2 p1 p0 Relative Output Power [dB]  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
-3  
-6  
The output power is given in the table as relative to the  
maximum available power, which depends on the actual  
antenna impedance. (See: Antenna Application Note  
available from www.silabs.com/integration).  
-9  
-12  
-15  
-18  
-21  
15  
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