Si1000/1/2/3/4/5
SFR Definition 22.1. SPI1CFG: SPI Configuration ..................................................... 234
SFR Definition 22.2. SPI1CN: SPI Control ................................................................. 235
SFR Definition 22.3. SPI1CKR: SPI Clock Rate ......................................................... 236
SFR Definition 22.4. SPI1DAT: SPI Data ................................................................... 237
SFR Definition 24.1. SMB0CF: SMBus Clock/Configuration ...................................... 293
SFR Definition 24.2. SMB0CN: SMBus Control .......................................................... 295
SFR Definition 24.3. SMB0ADR: SMBus Slave Address ............................................ 298
SFR Definition 24.4. SMB0ADM: SMBus Slave Address Mask .................................. 298
SFR Definition 24.5. SMB0DAT: SMBus Data ............................................................ 301
SFR Definition 25.1. SCON0: Serial Port 0 Control .................................................... 314
SFR Definition 25.2. SBUF0: Serial (UART0) Port Data Buffer .................................. 315
SFR Definition 26.7. SPI0CFG: SPI0 Configuration ................................................... 324
SFR Definition 26.8. SPI0CN: SPI0 Control ............................................................... 325
SFR Definition 26.9. SPI0CKR: SPI0 Clock Rate ....................................................... 326
SFR Definition 26.10. SPI0DAT: SPI0 Data ............................................................... 326
SFR Definition 27.1. CKCON: Clock Control .............................................................. 331
SFR Definition 27.2. TCON: Timer Control ................................................................. 336
SFR Definition 27.3. TMOD: Timer Mode ................................................................... 337
SFR Definition 27.4. TL0: Timer 0 Low Byte ............................................................... 338
SFR Definition 27.5. TL1: Timer 1 Low Byte ............................................................... 338
SFR Definition 27.6. TH0: Timer 0 High Byte ............................................................. 339
SFR Definition 27.7. TH1: Timer 1 High Byte ............................................................. 339
SFR Definition 27.8. TMR2CN: Timer 2 Control ......................................................... 343
SFR Definition 27.9. TMR2RLL: Timer 2 Reload Register Low Byte .......................... 344
SFR Definition 27.10. TMR2RLH: Timer 2 Reload Register High Byte ...................... 344
SFR Definition 27.11. TMR2L: Timer 2 Low Byte ....................................................... 345
SFR Definition 27.12. TMR2H Timer 2 High Byte ....................................................... 345
SFR Definition 27.13. TMR3CN: Timer 3 Control ....................................................... 349
SFR Definition 27.14. TMR3RLL: Timer 3 Reload Register Low Byte ........................ 350
SFR Definition 27.15. TMR3RLH: Timer 3 Reload Register High Byte ...................... 350
SFR Definition 27.16. TMR3L: Timer 3 Low Byte ....................................................... 351
SFR Definition 27.17. TMR3H Timer 3 High Byte ....................................................... 351
SFR Definition 28.1. PCA0CN: PCA Control .............................................................. 365
SFR Definition 28.2. PCA0MD: PCA Mode ................................................................ 366
SFR Definition 28.3. PCA0PWM: PCA PWM Configuration ....................................... 367
SFR Definition 28.4. PCA0CPMn: PCA Capture/Compare Mode .............................. 368
SFR Definition 28.5. PCA0L: PCA Counter/Timer Low Byte ...................................... 369
SFR Definition 28.6. PCA0H: PCA Counter/Timer High Byte ..................................... 369
SFR Definition 28.7. PCA0CPLn: PCA Capture Module Low Byte ............................. 370
SFR Definition 28.8. PCA0CPHn: PCA Capture Module High Byte ........................... 370
C2 Register Definition 29.1. C2ADD: C2 Address ...................................................... 371
C2 Register Definition 29.2. DEVICEID: C2 Device ID ............................................... 372
C2 Register Definition 29.3. REVID: C2 Revision ID .................................................. 372
C2 Register Definition 29.4. FPCTL: C2 Flash Programming Control ........................ 373
C2 Register Definition 29.5. FPDAT: C2 Flash Programming Data ............................ 373
Rev. 1.0
9
SILICON [ SILICON ]
