Si1000/1/2/3/4/5
28.3.2. Software Timer (Compare) Mode
In Software Timer mode, the PCA counter/timer value is compared to the module's 16-bit capture/compare
register (PCA0CPHn and PCA0CPLn). When a match occurs, the Capture/Compare Flag (CCFn) in
PCA0CN is set to logic 1. An interrupt request is generated if the CCFn interrupt for that module is
enabled. The CCFn bit is not automatically cleared by hardware when the CPU vectors to the interrupt ser-
vice routine, and must be cleared by software. Setting the ECOMn and MATn bits in the PCA0CPMn regis-
ter enables Software Timer mode.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Cap-
ture/Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the
ECOMn bit to 0; writing to PCA0CPHn sets ECOMn to 1.
Write to
0
PCA0CPLn
ENB
Reset
Write to
PCA0CPHn
ENB
PCA Interrupt
1
PCA0CPMn
P E C C M T P E
W C A A A O W C
M O P P T G M C
1 M P N n n n F
PCA0CN
C C C C C
F R
C C C
F F F
2 1 0
PCA0CPLn
PCA0CPHn
6 n n n
n
n
x
0
0
0 0
x
0
1
Enable
Match
16-bit Comparator
PCA
Timebase
PCA0L
PCA0H
Figure 28.5. PCA Software Timer Mode Diagram
Rev. 1.0
357
SILICON [ SILICON ]
