Si1000/1/2/3/4/5
Table 24.5. SMBus Status Decoding With Hardware ACK Generation Disabled (EHACK = 0)
Values Read
Current SMbus State
Typical Response Options
Valuesto
Write
1110
1100
0
0
0
0
X
0
A master START was gener- Load slave address + R/W into
ated. SMB0DAT.
0
0
X
1100
A master data or address byte Set STA to restart transfer.
1
0
0
1
X
X
1110
-
was transmitted; NACK
received.
Abort transfer.
0
0
1
A master data or address byte Load next data byte into
0
0
X
1100
was transmitted; ACK
received.
SMB0DAT.
End transfer with STOP.
0
1
1
X
X
-
-
End transfer with STOP and start 1
another transfer.
Send repeated START.
1
0
0
X
X
1110
1000
Switch to Master Receiver Mode 0
(clear SI without writing new data
to SMB0DAT).
1000
1
0
X
A master data byte was
received; ACK requested.
Acknowledge received byte;
Read SMB0DAT.
0
0
1
1
1
0
0
1000
-
Send NACK to indicate last byte, 0
and send STOP.
Send NACK to indicate last byte, 1
and send STOP followed by
START.
1110
Send ACK followed by repeated 1
START.
0
0
0
1
0
1
1110
1110
1100
Send NACK to indicate last byte, 1
and send repeated START.
Send ACK and switch to Master 0
Transmitter Mode (write to
SMB0DAT before clearing SI).
Send NACK and switch to Mas-
ter Transmitter Mode (write to
SMB0DAT before clearing SI).
0
0
0
1100
306
Rev. 1.0
SILICON [ SILICON ]
