Si1000/1/2/3/4/5
SFR Definition 5.6. ADC0H: ADC0 Data Word High Byte
Bit
7
6
5
4
3
2
1
0
ADC0[15:8]
R/W
Name
Type
Reset
0
0
0
0
0
0
0
0
SFR Page = 0x0; SFR Address = 0xBE
Bit
Name
Description
Read
Write
7:0 ADC0[15:8]
Most Significant Byte of the Set the most significant
16-bit ADC0 Accumulator byte of the 16-bit ADC0
formatted according to the Accumulator to the value
settings in AD0SJST[2:0]. written.
ADC0 Data Word High
Byte.
Note: If Accumulator shifting is enabled, the most significant bits of the value read will be zeros. This register
should not be written when the SYNC bit is set to 1.
SFR Definition 5.7. ADC0L: ADC0 Data Word Low Byte
Bit
7
6
5
4
3
2
1
0
ADC0[7:0]
R/W
Name
Type
Reset
0
0
0
0
0
0
0
0
SFR Page = 0x0; SFR Address = 0xBD;
Bit
Name
Description
Read
Write
7:0
ADC0[7:0]
Least Significant Byte of the Set the least significant
ADC0 Data Word Low Byte.
16-bit ADC0 Accumulator
formatted according to the
settings in AD0SJST[2:0].
byte of the 16-bit ADC0
Accumulator to the value
written.
Note: If Accumulator shifting is enabled, the most significant bits of the value read will be the least significant bits of
the accumulator high byte. This register should not be written when the SYNC bit is set to 1.
86
Rev. 1.0
SILICON [ SILICON ]
