Si1000/1/2/3/4/5
Table 12.1. Interrupt Summary (Continued)
Interrupt Source
Pending Flag
Enable
Flag
Priority
Control
SmaRTClock Oscillator
Fail
0x008B 17
0x0093 18
OSCFAIL
(RTC0CN.5)
N
N
N
N
ERTC0F
(EIE2.2)
PFRTC0F
(EIP2.2)
2
EZRadioPRO Serial
Interface (SPI1)
SPIF (SPI1CN.7)
WCOL (SPI1CN.6)
MODF (SPI1CN.5)
RXOVRN (SPI1CN.4)
ESPI1
(EIE2.3)
PSPI1
(EIP2.3)
Notes:
1. Indicates a read-only interrupt pending flag. The interrupt enable may be used to prevent software from
vectoring to the associated interrupt service routine.
2. Indicates a register located in an indirect memory space.
12.5. Interrupt Register Descriptions
The SFRs used to enable the interrupt sources and set their priority level are described in the following
register descriptions. Refer to the data sheet section associated with a particular on-chip peripheral for
information regarding valid interrupt conditions for the peripheral and the behavior of its interrupt-pending
flag(s).
132
Rev. 1.0
SILICON [ SILICON ]
