Si1000/1/2/3/4/5
11.1. SFR Paging
To accommodate more than 128 SFRs in the 0x80 to 0xFF address space, SFR paging has been imple-
mented. By default, all SFR accesses target SFR Page 0x0 to allow access to the registers listed in
Table 11.1. During device initialization, some SFRs located on SFR Page 0xF may need to be accessed.
Table 11.2 lists the SFRs accessible from SFR Page 0x0F. Some SFRs are accessible from both pages,
including the SFRPAGE register. SFRs accessible only from Page 0xF are in bold.
The following procedure should be used when accessing SFRs from Page 0xF:
1. Save the current interrupt state (EA_save = EA).
2. Disable Interrupts (EA = 0).
3. Set SFRPAGE = 0xF.
4. Access the SFRs located on SFR Page 0xF.
5. Set SFRPAGE = 0x0.
6. Restore interrupt state (EA = EA_save).
Table 11.2. Special Function Register (SFR) Memory Map (Page 0xF)
F8
F0
E8
B
EIP1
EIE1
EIP2
EIE2
E0 ACC
D8
D0 PSW
C8
C0
B8
B0
ADC0PWR
ADC0TK
P1DRV
A8
A0
98
90
88
80
IE
CLKSEL
P2
P0DRV
P2DRV
SFRPAGE
P1
CRC0DAT CRC0CN
CRC0IN
CRC0FLIP CRC0AUTO CRC0CNT
P0
SP
DPL
2(A)
DPH
3(B)
TOFFL
TOFFH
PCON
7(F)
0(8)
1(9)
4(C)
5(D)
6(E)
(bit addressable)
124
Rev. 1.0
SILICON [ SILICON ]
