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EFR32MG13P732F512IM32-D 参数 Datasheet PDF下载

EFR32MG13P732F512IM32-D图片预览
型号: EFR32MG13P732F512IM32-D
PDF下载: 下载PDF文件 查看货源
内容描述: [EFR32MG13 Mighty Gecko Multi-Protocol Wireless SoC Family Data Sheet]
分类和应用: 无线
文件页数/大小: 194 页 / 2303 K
品牌: SILICON [ SILICON ]
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EFR32MG13 Mighty Gecko Multi-Protocol Wireless SoC Family Data Sheet  
Electrical Specifications  
4.1.6 Wake Up Times  
Table 4.9. Wake Up Times  
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
Wake up time from EM1  
tEM1_WU  
3
AHB  
Clocks  
Wake up from EM2  
Wake up from EM3  
tEM2_WU  
Code execution from flash  
Code execution from RAM  
Code execution from flash  
Code execution from RAM  
Executing from flash  
10.9  
3.8  
µs  
µs  
µs  
µs  
µs  
tEM3_WU  
10.9  
3.8  
Wake up from EM4H1  
Wake up from EM4S1  
tEM4H_WU  
tEM4S_WU  
tRESET  
90  
Executing from flash  
300  
µs  
Time from release of reset  
source to first instruction ex-  
ecution  
Soft Pin Reset released  
Any other reset released  
51  
µs  
µs  
358  
Power mode scaling time  
tSCALE  
VSCALE0 to VSCALE2, HFCLK =  
19 MHz2 3  
31.8  
4.3  
µs  
µs  
VSCALE2 to VSCALE0, HFCLK =  
19 MHz4  
Note:  
1. Time from wake up request until first instruction is executed. Wakeup results in device reset.  
2. Scaling up from VSCALE0 to VSCALE2 requires approximately 30.3 µs + 28 HFCLKs.  
3. VSCALE0 to VSCALE2 voltage change transitions occur at a rate of 10 mV/µs for approximately 20 µs. During this transition,  
peak currents will be dependent on the value of the DECOUPLE output capacitor, from 35 mA (with a 1 µF capacitor) to 70 mA  
(with a 2.7 µF capacitor).  
4. Scaling down from VSCALE2 to VSCALE0 requires approximately 2.8 µs + 29 HFCLKs.  
silabs.com | Building a more connected world.  
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