C8051F50x-F51x
VREGIN
VDD
VDD
4.7 µF
.1 µF
Figure 10.2. External Capacitors for Voltage Regulator Input/Output—
Regulator Disabled
SFR Definition 10.1. REG0CN: Regulator Control
Bit
7
6
5
4
3
2
1
0
REGDIS
REG0MD
DROPOUT
Name
Type
Reset
R/W
0
R/W
0
R
0
R/W
1
R
0
R
0
R
0
R
0
SFR Address = 0xC9; SFR Page = 0x00
Bit
Name
Function
7
REGDIS
Voltage Regulator Disable Bit.
0: Voltage Regulator Enabled
1: Voltage Regulator Disabled
6
5
4
Unused
Unused
Read = 0b; Must Write 0b.
Read = 0b; Write = Don’t Care.
REG0MD
Voltage Regulator Mode Select Bit.
0: Voltage Regulator Output is 2.1V.
1: Voltage Regulator Output is 2.6V.
3:1
0
Unused
Read = 000b. Write = Don’t Care.
DROPOUT
Voltage Regulator Dropout Indicator.
0: Voltage Regulator is not in dropout
1: Voltage Regulator is in or near dropout.
Rev. 1.1
85
SILICON [ SILICON ]
