C8051F50x-F51x
SYSCLK
1
2
1
Baud Rate = ------------------------------------------------------------------------------ x -- x ------------------------
65536 – (SBRLH0:SBRLL0) Prescaler
Equation 24.1. UART0 Baud Rate
A quick reference for typical baud rates and clock frequencies is given in Table 24.1.
Table 24.1. Baud Rate Generator Settings for Standard Baud Rates
Target Baud Actual Baud Baud Rate
Oscillator
Divide
SB0PS[1:0]
Reload Value in
SBRLH0:SBRLL0
Rate (bps)
Rate (bps)
Error
(Prescaler Bits)
Factor
230400
115200
57600
28800
14400
9600
230769
115385
57554
28812
14397
9600
0.16%
0.16%
0.08%
0.04%
0.02%
0.00%
0.00%
0.00%
0.16%
0.16%
0.16%
0.08%
0.04%
0.00%
0.00%
0.00%
0.16%
0.16%
0.16%
0.16%
0.08%
0.00%
0.00%
0.00%
208
416
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
0xFF98
0xFF30
0xFE5F
0xFCBF
0xF97D
0xF63C
0xD8F0
0xB1E0
0xFFCC
0xFF98
0xFF30
0xFE5F
0xFCBF
0xFB1E
0xEC78
0xD8F0
0xFFE6
0xFFCC
0xFF98
0xFF30
0xFE5F
0xFD8F
0xF63C
0xEC78
834
1666
3334
5000
20000
40000
104
2400
2400
1200
1200
230400
115200
57600
28800
14400
9600
230769
115385
57692
28777
14406
9600
208
416
834
1666
2500
10000
20000
52
2400
2400
1200
1200
230400
115200
57600
28800
14400
9600
230769
115385
57692
28846
14388
9600
104
208
416
834
1250
5000
10000
2400
2400
1200
1200
244
Rev. 1.1
SILICON [ SILICON ]
