C8051F50x-F51x
Table 23.3. Sources for Hardware Changes to SMB0CN
Bit
Set by Hardware When:
Cleared by Hardware When:
MASTER
A START is generated.
A STOP is generated.
Arbitration is lost.
TXMODE
START is generated.
A START is detected.
Arbitration is lost.
SMB0DAT is written before the start of an
SMBus frame.
SMB0DAT is not written before the
start of an SMBus frame.
STA
STO
A START followed by an address byte is
Must be cleared by software.
received.
A STOP is detected while addressed as a
A pending STOP is generated.
slave.
Arbitration is lost due to a detected STOP.
A byte has been received and an ACK
response value is needed.
A repeated START is detected as a
MASTER when STA is low (unwanted
repeated START).
ACKRQ
After each ACK cycle.
Each time SI is cleared.
ARBLOST
SCL is sensed low while attempting to
generate a STOP or repeated START
condition.
SDA is sensed low while transmitting a 1
(excluding ACK bits).
ACK
SI
The incoming ACK value is low
(ACKNOWLEDGE).
A START has been generated.
The incoming ACK value is high
(NOT ACKNOWLEDGE).
Must be cleared by software.
Lost arbitration.
A byte has been transmitted and an
ACK/NACK received.
A byte has been received.
A START or repeated START followed by a
slave address + R/W has been received.
A STOP has been received.
Rev. 1.1
235
SILICON [ SILICON ]
