C8051F336/7/8/9
11.1. Comparator Multiplexer
C8051F336/7/8/9 devices include an analog input multiplexer to connect Port I/O pins to the comparator
inputs. The Comparator0 inputs are selected in the CPT0MX register (SFR Definition 11.3). The CMX0P1–
CMX0P0 bits select the Comparator0 positive input; the CMX0N1–CMX0N0 bits select the Comparator0
negative input. Important Note About Comparator Inputs: The Port pins selected as comparator inputs
should be configured as analog inputs in their associated Port configuration register, and configured to be
skipped by the Crossbar (for details on Port configuration, see Section “20.6. Special Function Registers
for Accessing and Configuring Port I/O” on page 138).
CPT0MX
P0.0
P0.2
P0.4
P0.6
P1.0
P1.2
VDD
P1.4
P1.6
P2.0*
P2.2*
CP0 +
CP0 -
+
-
P0.1
P0.3
P0.5
P0.7
P1.1
P1.3
P1.5
P1.7
P2.1*
P2.3*
GND
*P2.0-P2.3 Only available as
inputs on QFN24 Packaging
Figure 11.3. Comparator Input Multiplexer Block Diagram
70
Rev. 0.2
SILICON [ SILICON ]
