C8051F336/7/8/9
20.3. Priority Crossbar Decoder
The Priority Crossbar Decoder (Figure 20.3) assigns a priority to each I/O function, starting at the top with
UART0. When a digital resource is selected, the least-significant unassigned Port pin is assigned to that
resource (excluding UART0, which is always at pins 4 and 5). If a Port pin is assigned, the Crossbar skips
that pin when assigning the next selected resource. Additionally, the Crossbar will skip Port pins whose
associated bits in the PnSKIP registers are set. The PnSKIP registers allow software to skip Port pins that
are to be used for analog input, dedicated functions, or GPIO.
Important Note on Crossbar Configuration: If a Port pin is claimed by a peripheral without use of the
Crossbar, its corresponding PnSKIP bit should be set. This applies to P0.0 if VREF is used, P0.3 and/or
P0.2 if the external oscillator circuit is enabled, P0.6 if the ADC or IDAC is configured to use the external
conversion start signal (CNVSTR), and any selected ADC or Comparator inputs. The Crossbar skips
selected pins as if they were already assigned, and moves to the next unassigned pin. Figure 20.3 shows
the Crossbar Decoder priority with no Port pins skipped (P0SKIP, P1SKIP = 0x00); Figure 20.4 shows the
Crossbar Decoder priority with the XTAL1 (P0.2) and XTAL2 (P0.3) pins skipped (P0SKIP = 0x0C).
P0
P1
P2
SF Signals
PIN I/O
VREF IDA x1 x2
0 1 2 3
CNVSTR
6
1 2 2 2 3 2 4 2
4
5
7
0
1
2
3
4
5
6
7
0
TX0
RX0
SCK
MISO
MOSI
NSS1
SDA
SCL
CP0
CP0A
SYSCLK
CEX0
CEX1
CEX2
ECI
T0
T1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
P0SKIP[0:7]
P1SKIP[0:7]
P2SKIP[0:3]
Port pin potentially available to peripheral
Notes:
SF Signals
1. NSS is only pinned out in 4-wire SPI Mode
2. Pins P2.1-P2.4 only on QFN24 Package
Special Function Signals are not assigned by the crossbar.
When these signals are enabled, the CrossBar must be
manually configured to skip their corresponding port pins.
Figure 20.3. Crossbar Priority Decoder with No Pins Skipped
Rev. 0.2
131
SILICON [ SILICON ]
