C8051F39x/37x
SFR Definition 9.9. AMX0P: AMUX0 Positive Channel Select
Bit
7
6
5
4
3
2
1
0
AMX0P[4:0]
Name
Type
Reset
R
0
R
0
R
0
R/W
1
1
1
1
1
SFR Address = 0xBB; SFR Page = All Pages
Bit
Name
Function
7:5
Unused
Read = 000b; Write = Don’t Care.
4:0 AMX0P[4:0]
AMUX0 Positive Input Selection.
00000:
00001:
00010:
00011:
00100:
00101:
00110:
00111:
01000:
01001:
01010:
01011:
01100:
01101:
01110:
01111:
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
10000:
10001:
10010:
10011:
10100:
10101:
10110 – 11111:
Temp Sensor
V
DD
P2.0 (C8051F390/1/4/5 and C8051F37x Only)
P2.1 (C8051F390/1/4/5 and C8051F37x Only)
P2.2 (C8051F390/1/4/5 and C8051F37x Only)
P2.3 (C8051F390/1/4/5 and C8051F37x Only)
no input selected
60
Preliminary Rev. 0.71
SILICON [ SILICON ]
