C8051F39x/37x
Table 19.3. Special Function Registers (Continued)
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
Register
EMI0CN
FLKEY
FLSCL
IDA0CN
IDA0H
Address SFR Page Description
All Pages External Memory Interface Control
Page
0xAA
0xB7
0xB6
0xB9
0x97
0x96
0xB9
0x97
0x96
0xA8
0xB8
0x84
0xE4
0xB3
0xB2
0xE3
0xB1
0x80
0xFE
0xFD
0xF1
0xA4
0xD4
0x90
0xEE
0xED
0xF2
0xA5
0xD5
0xA0
0xF3
0xA6
0xD6
0xCE
94
All Pages Flash Lock and Key
All Pages Flash Scale
136
137
67
0
0
0
F
F
F
Current Mode DAC0 Control
Current Mode DAC0 High
Current Mode DAC0 Low
Current Mode DAC1 Control
Current Mode DAC1 High
Current Mode DAC1 Low
68
68
IDA0L
69
IDA1CN
IDA1H
70
70
IDA1L
All Pages Interrupt Enable
118
119
120
127
164
165
166
170
184
181
182
184
185
185
186
182
183
186
187
187
188
188
189
189
291
IE
All Pages Interrupt Priority
IP
All Pages Interrupt Priority High
All Pages INT0/INT1 Configuration
All Pages Internal Oscillator Calibration
All Pages Internal Oscillator Control
All Pages Low-Frequency Oscillator Control
All Pages External Oscillator Control
All Pages Port 0 Latch
IPH
IT01CF
OSCICL
OSCICN
OSCLCN
OSCXCN
P0
All Pages Port 0 Mask Configuration
All Pages Port 0 Match Configuration
All Pages Port 0 Input Mode Configuration
All Pages Port 0 Output Mode Configuration
All Pages Port 0 Skip
P0MASK
P0MAT
P0MDIN
P0MDOUT
P0SKIP
P1
All Pages Port 1 Latch
All Pages Port 1Mask Configuration
All Pages Port 1 Match Configuration
All Pages Port 1 Input Mode Configuration
All Pages Port 1 Output Mode Configuration
All Pages Port 1 Skip
P1MASK
P1MAT
P1MDIN
P1MDOUT
P1SKIP
P2
All Pages Port 2 Latch
All Pages Port 2 Input Mode Configuration
All Pages Port 2 Output Mode Configuration
All Pages Port 2 Skip
P2MDIN
P2MDOUT
P2SKIP
PCA0CLR
All Pages PCA Comparator Clear Control
Preliminary Rev. 0.71
111
SILICON [ SILICON ]
