C8051F360/1/2/3/4/5/6/7/8/9
SFR Definition 10.4. EIP1: Extended Interrupt Priority 1
SFR Page:
F
SFR Address: 0xCE
R/W
PT3
Bit7
R/W
R/W
PCP0
Bit5
R/W
PPCA0
Bit4
R/W
R/W
R/W
–
R/W
Reset Value
PCP1
Bit6
PADC0 PWADC0
Bit3
PSMB0 00000000
Bit2
Bit1
Bit0
Bit 7:
PT3: Timer 3 Interrupt Priority Control.
This bit sets the priority of the Timer 3 interrupt.
0: Timer 3 interrupts set to low priority level.
1: Timer 3 interrupts set to high priority level.
Bit 6:
Bit 5:
Bit 4:
Bit 3:
Bit 2:
PCP1: Comparator1 (CP1) Interrupt Priority Control.
This bit sets the priority of the CP1 interrupt.
0: CP1 interrupt set to low priority level.
1: CP1 interrupt set to high priority level.
PCP0: Comparator0 (CP0) Interrupt Priority Control.
This bit sets the priority of the CP0 interrupt.
0: CP0 interrupt set to low priority level.
1: CP0 interrupt set to high priority level.
PPCA0: Programmable Counter Array (PCA0) Interrupt Priority Control.
This bit sets the priority of the PCA0 interrupt.
0: PCA0 interrupt set to low priority level.
1: PCA0 interrupt set to high priority level.
PADC0: ADC0 Conversion Complete Interrupt Priority Control.
This bit sets the priority of the ADC0 Conversion Complete interrupt.
0: ADC0 Conversion Complete interrupt set to low priority level.
1: ADC0 Conversion Complete interrupt set to high priority level.
PWADC0: ADC0 Window Comparison Interrupt Priority Control.
This bit sets the priority of the ADC0 Window Comparison interrupt.
0: ADC0 Window Comparison interrupt set to low priority level.
1: ADC0 Window Comparison interrupt set to high priority level.
UNUSED. Read = 0b. Write = don’t care.
Bit 1:
Bit 0:
PSMB0: SMBus (SMB0) Interrupt Priority Control.
This bit sets the priority of the SMB0 interrupt.
0: SMB0 interrupt set to low priority level.
1: SMB0 interrupt set to high priority level.
Rev. 1.0
113
SILICON [ SILICON ]
