HIGH RIPPLE-REJECTION WLP PACKAGE LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-L2985 Series
Standard Circuit
Output
Input
VIN
VOUT
*2
*1
ON/OFF
CL
CIN
VSS
GND
Single GND
*1. CIN is a capacitor for stabilizing the input.
*2. A ceramic capacitor of 0.47 μF or more can be used for CL.
Figure 9
Caution The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
Application Conditions
Input capacitor (CIN):
Output capacitor (CL):
ESR of output capacitor:
1.0 μF or more
0.47 μF or more
10 Ω or less
Caution A general series regulator may oscillate, depending on the external components selected.
Check that no oscillation occurs with the application using the above capacitor.
8
Seiko Instruments Inc.
SII [ SEIKO INSTRUMENTS INC ]
