HIGH RIPPLE-REJECTION WLP PACKAGE LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.2.1
_00
S-L2985 Series
Standard Circuit
Input
VIN
C
IN
*1
Output
VOUT
C
L
*2
ON/OFF
VSS
Single GND
GND
*1.
C
IN
is a capacitor for stabilizing the input.
*2.
A ceramic capacitor of 0.47
μF
or more can be used for C
L
.
Figure 9
Caution The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
Application Conditions
Input capacitor (C
IN
):
Output capacitor (C
L
):
ESR of output capacitor:
1.0
μF
or more
0.47
μF
or more
10
Ω
or less
Caution A general series regulator may oscillate, depending on the external components selected.
Check that no oscillation occurs with the application using the above capacitor.
8
Seiko Instruments Inc.
SII [ SEIKO INSTRUMENTS INC ]
